aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/pm34xx.c
diff options
context:
space:
mode:
authorPeter 'p2' De Schrijver <peter.de-schrijver@nokia.com>2009-03-10 12:05:19 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2009-11-11 17:42:50 -0500
commitda869621c3cd93d5a8361f243b50e5d48d12bd14 (patch)
treef1e8385925581893c7c2a9d4f4633712ff4f9fe5 /arch/arm/mach-omap2/pm34xx.c
parent7139178e9baf44dab454b757ed91a9ee149ad0f2 (diff)
OMAP3: PM: idle: Remove fclk check for idle loop
This patch removes the check to see if some functional clocks are still enabled before entering sleep. This is no longer needed when using safe state (C1) that keeps CORE active. Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-omap2/pm34xx.c')
-rw-r--r--arch/arm/mach-omap2/pm34xx.c42
1 files changed, 0 insertions, 42 deletions
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index c77f6db8a63d..4e87b61ca040 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -461,54 +461,12 @@ void omap_sram_idle(void)
461 omap2_clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]); 461 omap2_clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]);
462} 462}
463 463
464/*
465 * Check if functional clocks are enabled before entering
466 * sleep. This function could be behind CONFIG_PM_DEBUG
467 * when all drivers are configuring their sysconfig registers
468 * properly and using their clocks properly.
469 */
470static int omap3_fclks_active(void)
471{
472 u32 fck_core1 = 0, fck_core3 = 0, fck_sgx = 0, fck_dss = 0,
473 fck_cam = 0, fck_per = 0, fck_usbhost = 0;
474
475 fck_core1 = cm_read_mod_reg(CORE_MOD,
476 CM_FCLKEN1);
477 if (omap_rev() > OMAP3430_REV_ES1_0) {
478 fck_core3 = cm_read_mod_reg(CORE_MOD,
479 OMAP3430ES2_CM_FCLKEN3);
480 fck_sgx = cm_read_mod_reg(OMAP3430ES2_SGX_MOD,
481 CM_FCLKEN);
482 fck_usbhost = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD,
483 CM_FCLKEN);
484 } else
485 fck_sgx = cm_read_mod_reg(GFX_MOD,
486 OMAP3430ES2_CM_FCLKEN3);
487 fck_dss = cm_read_mod_reg(OMAP3430_DSS_MOD,
488 CM_FCLKEN);
489 fck_cam = cm_read_mod_reg(OMAP3430_CAM_MOD,
490 CM_FCLKEN);
491 fck_per = cm_read_mod_reg(OMAP3430_PER_MOD,
492 CM_FCLKEN);
493
494 /* Ignore UART clocks. These are handled by UART core (serial.c) */
495 fck_core1 &= ~(OMAP3430_EN_UART1 | OMAP3430_EN_UART2);
496 fck_per &= ~OMAP3430_EN_UART3;
497
498 if (fck_core1 | fck_core3 | fck_sgx | fck_dss |
499 fck_cam | fck_per | fck_usbhost)
500 return 1;
501 return 0;
502}
503
504int omap3_can_sleep(void) 464int omap3_can_sleep(void)
505{ 465{
506 if (!sleep_while_idle) 466 if (!sleep_while_idle)
507 return 0; 467 return 0;
508 if (!omap_uart_can_sleep()) 468 if (!omap_uart_can_sleep())
509 return 0; 469 return 0;
510 if (omap3_fclks_active())
511 return 0;
512 return 1; 470 return 1;
513} 471}
514 472