Merge branch 'for_3.4/dt_base' of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt into dt

1 files changed, 44 insertions, 114 deletions

diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index fa637dfdda53..fc6987578920 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -28,7 +28,6 @@
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/slab.h>
-#include <linux/console.h>
 #include <trace/events/power.h>
 
 #include <asm/suspend.h>
@@ -36,7 +35,6 @@
 #include <plat/sram.h>
 #include "clockdomain.h"
 #include "powerdomain.h"
-#include <plat/serial.h>
 #include <plat/sdrc.h>
 #include <plat/prcm.h>
 #include <plat/gpmc.h>
@@ -54,15 +52,6 @@
 
 #ifdef CONFIG_SUSPEND
 static suspend_state_t suspend_state = PM_SUSPEND_ON;
-static inline bool is_suspending(void)
-{
-        return (suspend_state != PM_SUSPEND_ON) && console_suspend_enabled;
-}
-#else
-static inline bool is_suspending(void)
-{
-        return false;
-}
 #endif
 
 /* pm34xx errata defined in pm.h */
@@ -195,7 +184,7 @@ static void omap3_save_secure_ram_context(void)
  * that any peripheral wake-up events occurring while attempting to
  * clear the PM_WKST_x are detected and cleared.
  */
-static int prcm_clear_mod_irqs(s16 module, u8 regs)
+static int prcm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits)
 {
         u32 wkst, fclk, iclk, clken;
         u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1;
@@ -207,6 +196,7 @@ static int prcm_clear_mod_irqs(s16 module, u8 regs)
 
         wkst = omap2_prm_read_mod_reg(module, wkst_off);
         wkst &= omap2_prm_read_mod_reg(module, grpsel_off);
+        wkst &= ~ignore_bits;
         if (wkst) {
                 iclk = omap2_cm_read_mod_reg(module, iclk_off);
                 fclk = omap2_cm_read_mod_reg(module, fclk_off);
@@ -222,6 +212,7 @@ static int prcm_clear_mod_irqs(s16 module, u8 regs)
                         omap2_cm_set_mod_reg_bits(clken, module, fclk_off);
                         omap2_prm_write_mod_reg(wkst, module, wkst_off);
                         wkst = omap2_prm_read_mod_reg(module, wkst_off);
+                        wkst &= ~ignore_bits;
                         c++;
                 }
                 omap2_cm_write_mod_reg(iclk, module, iclk_off);
@@ -231,76 +222,35 @@ static int prcm_clear_mod_irqs(s16 module, u8 regs)
         return c;
 }
 
-static int _prcm_int_handle_wakeup(void)
+static irqreturn_t _prcm_int_handle_io(int irq, void *unused)
 {
         int c;
 
-        c = prcm_clear_mod_irqs(WKUP_MOD, 1);
-        c += prcm_clear_mod_irqs(CORE_MOD, 1);
-        c += prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1);
-        if (omap_rev() > OMAP3430_REV_ES1_0) {
-                c += prcm_clear_mod_irqs(CORE_MOD, 3);
-                c += prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1);
-        }
+        c = prcm_clear_mod_irqs(WKUP_MOD, 1,
+                ~(OMAP3430_ST_IO_MASK | OMAP3430_ST_IO_CHAIN_MASK));
 
-        return c;
+        return c ? IRQ_HANDLED : IRQ_NONE;
 }
 
-/*
- * PRCM Interrupt Handler
- *
- * The PRM_IRQSTATUS_MPU register indicates if there are any pending
- * interrupts from the PRCM for the MPU. These bits must be cleared in
- * order to clear the PRCM interrupt. The PRCM interrupt handler is
- * implemented to simply clear the PRM_IRQSTATUS_MPU in order to clear
- * the PRCM interrupt. Please note that bit 0 of the PRM_IRQSTATUS_MPU
- * register indicates that a wake-up event is pending for the MPU and
- * this bit can only be cleared if the all the wake-up events latched
- * in the various PM_WKST_x registers have been cleared. The interrupt
- * handler is implemented using a do-while loop so that if a wake-up
- * event occurred during the processing of the prcm interrupt handler
- * (setting a bit in the corresponding PM_WKST_x register and thus
- * preventing us from clearing bit 0 of the PRM_IRQSTATUS_MPU register)
- * this would be handled.
- */
-static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id)
+static irqreturn_t _prcm_int_handle_wakeup(int irq, void *unused)
 {
-        u32 irqenable_mpu, irqstatus_mpu;
-        int c = 0;
-
-        irqenable_mpu = omap2_prm_read_mod_reg(OCP_MOD,
-                                         OMAP3_PRM_IRQENABLE_MPU_OFFSET);
-        irqstatus_mpu = omap2_prm_read_mod_reg(OCP_MOD,
-                                         OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
-        irqstatus_mpu &= irqenable_mpu;
-
-        do {
-                if (irqstatus_mpu & (OMAP3430_WKUP_ST_MASK |
-                                     OMAP3430_IO_ST_MASK)) {
-                        c = _prcm_int_handle_wakeup();
-
-                        /*
-                         * Is the MPU PRCM interrupt handler racing with the
-                         * IVA2 PRCM interrupt handler ?
-                         */
-                        WARN(c == 0, "prcm: WARNING: PRCM indicated MPU wakeup "
-                             "but no wakeup sources are marked\n");
-                } else {
-                        /* XXX we need to expand our PRCM interrupt handler */
-                        WARN(1, "prcm: WARNING: PRCM interrupt received, but "
-                             "no code to handle it (%08x)\n", irqstatus_mpu);
-                }
-
-                omap2_prm_write_mod_reg(irqstatus_mpu, OCP_MOD,
-                                        OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
-
-                irqstatus_mpu = omap2_prm_read_mod_reg(OCP_MOD,
-                                        OMAP3_PRM_IRQSTATUS_MPU_OFFSET);
-                irqstatus_mpu &= irqenable_mpu;
+        int c;
 
-        } while (irqstatus_mpu);
+        /*
+         * Clear all except ST_IO and ST_IO_CHAIN for wkup module,
+         * these are handled in a separate handler to avoid acking
+         * IO events before parsing in mux code
+         */
+        c = prcm_clear_mod_irqs(WKUP_MOD, 1,
+                OMAP3430_ST_IO_MASK | OMAP3430_ST_IO_CHAIN_MASK);
+        c += prcm_clear_mod_irqs(CORE_MOD, 1, 0);
+        c += prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1, 0);
+        if (omap_rev() > OMAP3430_REV_ES1_0) {
+                c += prcm_clear_mod_irqs(CORE_MOD, 3, 0);
+                c += prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1, 0);
+        }
 
-        return IRQ_HANDLED;
+        return c ? IRQ_HANDLED : IRQ_NONE;
 }
 
 static void omap34xx_save_context(u32 *save)
@@ -376,20 +326,11 @@ void omap_sram_idle(void)
                         omap3_enable_io_chain();
         }
 
-        /* Block console output in case it is on one of the OMAP UARTs */
-        if (!is_suspending())
-                if (per_next_state < PWRDM_POWER_ON ||
-                    core_next_state < PWRDM_POWER_ON)
-                        if (!console_trylock())
-                                goto console_still_active;
-
         pwrdm_pre_transition();
 
         /* PER */
         if (per_next_state < PWRDM_POWER_ON) {
                 per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
-                omap_uart_prepare_idle(2);
-                omap_uart_prepare_idle(3);
                 omap2_gpio_prepare_for_idle(per_going_off);
                 if (per_next_state == PWRDM_POWER_OFF)
                                 omap3_per_save_context();
@@ -397,8 +338,6 @@ void omap_sram_idle(void)
 
         /* CORE */
         if (core_next_state < PWRDM_POWER_ON) {
-                omap_uart_prepare_idle(0);
-                omap_uart_prepare_idle(1);
                 if (core_next_state == PWRDM_POWER_OFF) {
                         omap3_core_save_context();
                         omap3_cm_save_context();
@@ -447,8 +386,6 @@ void omap_sram_idle(void)
                         omap3_sram_restore_context();
                         omap2_sms_restore_context();
                 }
-                omap_uart_resume_idle(0);
-                omap_uart_resume_idle(1);
                 if (core_next_state == PWRDM_POWER_OFF)
                         omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
                                                OMAP3430_GR_MOD,
@@ -464,14 +401,8 @@ void omap_sram_idle(void)
                 omap2_gpio_resume_after_idle();
                 if (per_prev_state == PWRDM_POWER_OFF)
                         omap3_per_restore_context();
-                omap_uart_resume_idle(2);
-                omap_uart_resume_idle(3);
         }
 
-        if (!is_suspending())
-                console_unlock();
-
-console_still_active:
         /* Disable IO-PAD and IO-CHAIN wakeup */
         if (omap3_has_io_wakeup() &&
             (per_next_state < PWRDM_POWER_ON ||
@@ -485,21 +416,11 @@ console_still_active:
         clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]);
 }
 
-int omap3_can_sleep(void)
-{
-        if (!omap_uart_can_sleep())
-                return 0;
-        return 1;
-}
-
 static void omap3_pm_idle(void)
 {
         local_irq_disable();
         local_fiq_disable();
 
-        if (!omap3_can_sleep())
-                goto out;
-
         if (omap_irq_pending() || need_resched())
                 goto out;
 
@@ -533,7 +454,6 @@ static int omap3_pm_suspend(void)
                         goto restore;
         }
 
-        omap_uart_prepare_suspend();
         omap3_intc_suspend();
 
         omap_sram_idle();
@@ -580,22 +500,27 @@ static int omap3_pm_begin(suspend_state_t state)
 {
         disable_hlt();
         suspend_state = state;
-        omap_uart_enable_irqs(0);
+        omap_prcm_irq_prepare();
         return 0;
 }
 
 static void omap3_pm_end(void)
 {
         suspend_state = PM_SUSPEND_ON;
-        omap_uart_enable_irqs(1);
         enable_hlt();
         return;
 }
 
+static void omap3_pm_finish(void)
+{
+        omap_prcm_irq_complete();
+}
+
 static const struct platform_suspend_ops omap_pm_ops = {
         .begin          = omap3_pm_begin,
         .end            = omap3_pm_end,
         .enter          = omap3_pm_enter,
+        .finish         = omap3_pm_finish,
         .valid          = suspend_valid_only_mem,
 };
 #endif /* CONFIG_SUSPEND */
@@ -701,10 +626,6 @@ static void __init prcm_setup_regs(void)
                           OMAP3430_GRPSEL_GPT1_MASK |
                           OMAP3430_GRPSEL_GPT12_MASK,
                           WKUP_MOD, OMAP3430_PM_MPUGRPSEL);
-        /* For some reason IO doesn't generate wakeup event even if
-         * it is selected to mpu wakeup goup */
-        omap2_prm_write_mod_reg(OMAP3430_IO_EN_MASK | OMAP3430_WKUP_EN_MASK,
-                          OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET);
 
         /* Enable PM_WKEN to support DSS LPR */
         omap2_prm_write_mod_reg(OMAP3430_PM_WKEN_DSS_EN_DSS_MASK,
@@ -881,12 +802,21 @@ static int __init omap3_pm_init(void)
          * supervised mode for powerdomains */
         prcm_setup_regs();
 
-        ret = request_irq(INT_34XX_PRCM_MPU_IRQ,
-                          (irq_handler_t)prcm_interrupt_handler,
-                          IRQF_DISABLED, "prcm", NULL);
+        ret = request_irq(omap_prcm_event_to_irq("wkup"),
+                _prcm_int_handle_wakeup, IRQF_NO_SUSPEND, "pm_wkup", NULL);
+
+        if (ret) {
+                pr_err("pm: Failed to request pm_wkup irq\n");
+                goto err1;
+        }
+
+        /* IO interrupt is shared with mux code */
+        ret = request_irq(omap_prcm_event_to_irq("io"),
+                _prcm_int_handle_io, IRQF_SHARED | IRQF_NO_SUSPEND, "pm_io",
+                omap3_pm_init);
+
         if (ret) {
-                printk(KERN_ERR "request_irq failed to register for 0x%x\n",
-                       INT_34XX_PRCM_MPU_IRQ);
+                pr_err("pm: Failed to request pm_io irq\n");
                 goto err1;
         }