ARM: OMAP2+: powerdomain: allow pre/post transtion to be per pwrdm

Iteration over all power domains in the idle path is unnecessary since
only power domains that are transitioning need to be accounted for.
Also PRCM register accesses are known to be expensive, so the
additional latency added to the idle path is signficiant.

In order allow the pre/post transitions to be isolated and called
per-pwrdm, change the API so passing in a specific power domain will
trigger the pre/post transtion accounting for only that specific power
domain.  Passing NULL means iterating over all power domains as is
current behavior.

Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index e67d898433fb..0bbbc8c82fd8 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -273,7 +273,7 @@ void omap_sram_idle(void)
         per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
         core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
 
-        pwrdm_pre_transition();
+        pwrdm_pre_transition(NULL);
 
         /* PER */
         if (per_next_state < PWRDM_POWER_ON) {
@@ -338,7 +338,7 @@ void omap_sram_idle(void)
         }
         omap3_intc_resume_idle();
 
-        pwrdm_post_transition();
+        pwrdm_post_transition(NULL);
 
         /* PER */
         if (per_next_state < PWRDM_POWER_ON)