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authorPaul Walmsley <paul@pwsan.com>2010-05-18 20:40:23 -0400
committerPaul Walmsley <paul@pwsan.com>2010-05-20 14:31:05 -0400
commit2fd0f75cb3413105ed10041c719346ccb710fbc6 (patch)
treefd7a69a45f9ad4c7530a05f5c869d8cf6e8f8141 /arch/arm/mach-omap2/pm24xx.c
parent2bc4ef71c5a3b6986b452d6c530777974d11ef4a (diff)
OMAP2+ PRCM: convert remaining PRCM macros to the _SHIFT/_MASK suffixes
Fix all of the remaining PRCM register shift/bitmask macros that did not use the _SHIFT/_MASK suffixes to use them. This makes the use of these macros consistent. It is intended to reduce error, as code can be inspected visually by reviewers to ensure that bitshifts and bitmasks are used in the appropriate places. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-omap2/pm24xx.c')
-rw-r--r--arch/arm/mach-omap2/pm24xx.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index b8c9e900a679..e321281ab6e1 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -70,8 +70,8 @@ static int omap2_fclks_active(void)
70 f2 = cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2); 70 f2 = cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
71 71
72 /* Ignore UART clocks. These are handled by UART core (serial.c) */ 72 /* Ignore UART clocks. These are handled by UART core (serial.c) */
73 f1 &= ~(OMAP24XX_EN_UART1 | OMAP24XX_EN_UART2); 73 f1 &= ~(OMAP24XX_EN_UART1_MASK | OMAP24XX_EN_UART2_MASK);
74 f2 &= ~OMAP24XX_EN_UART3; 74 f2 &= ~OMAP24XX_EN_UART3_MASK;
75 75
76 if (f1 | f2) 76 if (f1 | f2)
77 return 1; 77 return 1;
@@ -181,13 +181,13 @@ static int omap2_allow_mpu_retention(void)
181 181
182 /* Check for MMC, UART2, UART1, McSPI2, McSPI1 and DSS1. */ 182 /* Check for MMC, UART2, UART1, McSPI2, McSPI1 and DSS1. */
183 l = cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); 183 l = cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
184 if (l & (OMAP2420_EN_MMC | OMAP24XX_EN_UART2 | 184 if (l & (OMAP2420_EN_MMC_MASK | OMAP24XX_EN_UART2_MASK |
185 OMAP24XX_EN_UART1 | OMAP24XX_EN_MCSPI2 | 185 OMAP24XX_EN_UART1_MASK | OMAP24XX_EN_MCSPI2_MASK |
186 OMAP24XX_EN_MCSPI1 | OMAP24XX_EN_DSS1_MASK)) 186 OMAP24XX_EN_MCSPI1_MASK | OMAP24XX_EN_DSS1_MASK))
187 return 0; 187 return 0;
188 /* Check for UART3. */ 188 /* Check for UART3. */
189 l = cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2); 189 l = cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
190 if (l & OMAP24XX_EN_UART3) 190 if (l & OMAP24XX_EN_UART3_MASK)
191 return 0; 191 return 0;
192 if (sti_console_enabled) 192 if (sti_console_enabled)
193 return 0; 193 return 0;
@@ -215,12 +215,12 @@ static void omap2_enter_mpu_retention(void)
215 215
216 /* Try to enter MPU retention */ 216 /* Try to enter MPU retention */
217 prm_write_mod_reg((0x01 << OMAP_POWERSTATE_SHIFT) | 217 prm_write_mod_reg((0x01 << OMAP_POWERSTATE_SHIFT) |
218 OMAP_LOGICRETSTATE, 218 OMAP_LOGICRETSTATE_MASK,
219 MPU_MOD, OMAP2_PM_PWSTCTRL); 219 MPU_MOD, OMAP2_PM_PWSTCTRL);
220 } else { 220 } else {
221 /* Block MPU retention */ 221 /* Block MPU retention */
222 222
223 prm_write_mod_reg(OMAP_LOGICRETSTATE, MPU_MOD, 223 prm_write_mod_reg(OMAP_LOGICRETSTATE_MASK, MPU_MOD,
224 OMAP2_PM_PWSTCTRL); 224 OMAP2_PM_PWSTCTRL);
225 only_idle = 1; 225 only_idle = 1;
226 } 226 }
@@ -288,7 +288,8 @@ static int omap2_pm_suspend(void)
288 u32 wken_wkup, mir1; 288 u32 wken_wkup, mir1;
289 289
290 wken_wkup = prm_read_mod_reg(WKUP_MOD, PM_WKEN); 290 wken_wkup = prm_read_mod_reg(WKUP_MOD, PM_WKEN);
291 prm_write_mod_reg(wken_wkup & ~OMAP24XX_EN_GPT1, WKUP_MOD, PM_WKEN); 291 wken_wkup &= ~OMAP24XX_EN_GPT1_MASK;
292 prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
292 293
293 /* Mask GPT1 */ 294 /* Mask GPT1 */
294 mir1 = omap_readl(0x480fe0a4); 295 mir1 = omap_readl(0x480fe0a4);
@@ -469,7 +470,7 @@ static void __init prcm_setup_regs(void)
469 OMAP24XX_GR_MOD, OMAP2_PRCM_VOLTCTRL_OFFSET); 470 OMAP24XX_GR_MOD, OMAP2_PRCM_VOLTCTRL_OFFSET);
470 471
471 /* Enable wake-up events */ 472 /* Enable wake-up events */
472 prm_write_mod_reg(OMAP24XX_EN_GPIOS | OMAP24XX_EN_GPT1, 473 prm_write_mod_reg(OMAP24XX_EN_GPIOS_MASK | OMAP24XX_EN_GPT1_MASK,
473 WKUP_MOD, PM_WKEN); 474 WKUP_MOD, PM_WKEN);
474} 475}
475 476