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authorJean Pihet <j-pihet@ti.com>2011-06-29 12:40:23 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-06-29 14:07:47 -0400
commit46e130d298a384b677426e19faec311749ff2677 (patch)
tree5996accec8e0b1be693636085229afc95e372ded /arch/arm/mach-omap2/pm.h
parent0853f96f13e0b60f1c319bcd7f6a3a84d0d1e706 (diff)
ARM: pm: omap3: run the ASM sleep code from DDR
Most of the ASM sleep code (in arch/arm/mach-omap2/sleep34xx.S) is copied to internal SRAM at boot and after wake-up from CORE OFF mode. However only a small part of the code really needs to run from internal SRAM. This fix lets most of the ASM idle code run from the DDR in order to minimize the SRAM usage and the overhead in the code copy. The only pieces of code that are mandatory in SRAM are: - the i443 erratum WA, - the i581 erratum WA, - the security extension code. SRAM usage: - original code: . 560 bytes for omap3_sram_configure_core_dpll (used by DVFS), . 852 bytes for omap_sram_idle (used by suspend/resume in RETention), . 124 bytes for es3_sdrc_fix (used by suspend/resume in OFF mode on ES3.x), . 108 bytes for save_secure_ram_context (used on HS parts only). With this fix the usage for suspend/resume in RETention goes down 288 bytes, so the gain in SRAM usage for suspend/resume is 564 bytes. Also fixed the SRAM initialization sequence to avoid an unnecessary copy to SRAM at boot time and for readability. Tested on Beagleboard (ES2.x) in idle with full RET and OFF modes. Kevin Hilman tested retention and off on 3430/n900, 3530/Overo and 3630/Zoom3 Signed-off-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2/pm.h')
-rw-r--r--arch/arm/mach-omap2/pm.h20
1 files changed, 15 insertions, 5 deletions
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 45bcfce77352..a4ec213e30c0 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -88,18 +88,28 @@ extern int pm_dbg_regset_init(int reg_set);
88#define pm_dbg_regset_init(reg_set) do {} while (0); 88#define pm_dbg_regset_init(reg_set) do {} while (0);
89#endif /* CONFIG_PM_DEBUG */ 89#endif /* CONFIG_PM_DEBUG */
90 90
91/* 24xx */
91extern void omap24xx_idle_loop_suspend(void); 92extern void omap24xx_idle_loop_suspend(void);
93extern unsigned int omap24xx_idle_loop_suspend_sz;
92 94
93extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, 95extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
94 void __iomem *sdrc_power); 96 void __iomem *sdrc_power);
97extern unsigned int omap24xx_cpu_suspend_sz;
98
99/* 3xxx */
95extern void omap34xx_cpu_suspend(u32 *addr, int save_state); 100extern void omap34xx_cpu_suspend(u32 *addr, int save_state);
96extern int save_secure_ram_context(u32 *addr);
97extern void omap3_save_scratchpad_contents(void);
98 101
99extern unsigned int omap24xx_idle_loop_suspend_sz; 102/* omap3_do_wfi function pointer and size, for copy to SRAM */
103extern void omap3_do_wfi(void);
104extern unsigned int omap3_do_wfi_sz;
105/* ... and its pointer from SRAM after copy */
106extern void (*omap3_do_wfi_sram)(void);
107
108/* save_secure_ram_context function pointer and size, for copy to SRAM */
109extern int save_secure_ram_context(u32 *addr);
100extern unsigned int save_secure_ram_context_sz; 110extern unsigned int save_secure_ram_context_sz;
101extern unsigned int omap24xx_cpu_suspend_sz; 111
102extern unsigned int omap34xx_cpu_suspend_sz; 112extern void omap3_save_scratchpad_contents(void);
103 113
104#define PM_RTA_ERRATUM_i608 (1 << 0) 114#define PM_RTA_ERRATUM_i608 (1 << 0)
105#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1) 115#define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1)