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authorNishanth Menon <nm@ti.com>2011-05-18 01:17:34 -0400
committerKevin Hilman <khilman@ti.com>2011-09-15 15:09:37 -0400
commitee7fbba63e334481049a7939b8071160824447d3 (patch)
tree0d713921f83b3df4c0d240e5c1b2d6b5b3f8a51a /arch/arm/mach-omap2/omap_twl.c
parent63f60a43e640c2f56be902c69503ea28d1010416 (diff)
OMAP4: PM: TWL6030: add cmd register
Without the command register, ON/ONLP/RET/OFF voltages are useless. and TWL will be unable to use these Signed-off-by: Nishanth Menon <nm@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_twl.c')
-rw-r--r--arch/arm/mach-omap2/omap_twl.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c
index 4bc99fb0b81f..f515a1a056d5 100644
--- a/arch/arm/mach-omap2/omap_twl.c
+++ b/arch/arm/mach-omap2/omap_twl.c
@@ -42,8 +42,11 @@
42 42
43#define OMAP4_SRI2C_SLAVE_ADDR 0x12 43#define OMAP4_SRI2C_SLAVE_ADDR 0x12
44#define OMAP4_VDD_MPU_SR_VOLT_REG 0x55 44#define OMAP4_VDD_MPU_SR_VOLT_REG 0x55
45#define OMAP4_VDD_MPU_SR_CMD_REG 0x56
45#define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B 46#define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B
47#define OMAP4_VDD_IVA_SR_CMD_REG 0x5C
46#define OMAP4_VDD_CORE_SR_VOLT_REG 0x61 48#define OMAP4_VDD_CORE_SR_VOLT_REG 0x61
49#define OMAP4_VDD_CORE_SR_CMD_REG 0x62
47 50
48#define OMAP4_VP_CONFIG_ERROROFFSET 0x00 51#define OMAP4_VP_CONFIG_ERROROFFSET 0x00
49#define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01 52#define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01
@@ -210,6 +213,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = {
210 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, 213 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
211 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, 214 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
212 .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, 215 .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG,
216 .cmd_reg_addr = OMAP4_VDD_MPU_SR_CMD_REG,
213 .i2c_high_speed = true, 217 .i2c_high_speed = true,
214 .vsel_to_uv = twl6030_vsel_to_uv, 218 .vsel_to_uv = twl6030_vsel_to_uv,
215 .uv_to_vsel = twl6030_uv_to_vsel, 219 .uv_to_vsel = twl6030_uv_to_vsel,
@@ -231,6 +235,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = {
231 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, 235 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
232 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, 236 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
233 .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, 237 .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG,
238 .cmd_reg_addr = OMAP4_VDD_IVA_SR_CMD_REG,
234 .i2c_high_speed = true, 239 .i2c_high_speed = true,
235 .vsel_to_uv = twl6030_vsel_to_uv, 240 .vsel_to_uv = twl6030_vsel_to_uv,
236 .uv_to_vsel = twl6030_uv_to_vsel, 241 .uv_to_vsel = twl6030_uv_to_vsel,
@@ -252,6 +257,7 @@ static struct omap_voltdm_pmic omap4_core_pmic = {
252 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, 257 .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US,
253 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, 258 .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR,
254 .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, 259 .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG,
260 .cmd_reg_addr = OMAP4_VDD_CORE_SR_CMD_REG,
255 .vsel_to_uv = twl6030_vsel_to_uv, 261 .vsel_to_uv = twl6030_vsel_to_uv,
256 .uv_to_vsel = twl6030_uv_to_vsel, 262 .uv_to_vsel = twl6030_uv_to_vsel,
257}; 263};