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authorTero Kristo <t-kristo@ti.com>2013-02-06 08:09:20 -0500
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2013-03-28 03:25:58 -0400
commitf98d5fe8079cc4830e4ce22585055822119da5c8 (patch)
treeac7e617e4a529a9fd546ea05faa7cedcfea41c20 /arch/arm/mach-omap2/omap4-sar-layout.h
parenta937536b868b8369b98967929045f1df54234323 (diff)
ARM: OMAP4+: Use common scratchpad SAR RAM offsets for all architectures
Choose the common scratch pad offsets, so that same offsets can work for OMAP4 and OMAP5 devices. It simplifies code and also allows the re-use as is on OMAP5 devices. Note that these offsets are used by low power code for various power state management. They are not hardware register offsets. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap4-sar-layout.h')
-rw-r--r--arch/arm/mach-omap2/omap4-sar-layout.h14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/omap4-sar-layout.h b/arch/arm/mach-omap2/omap4-sar-layout.h
index e170fe803b04..6822d0a7324f 100644
--- a/arch/arm/mach-omap2/omap4-sar-layout.h
+++ b/arch/arm/mach-omap2/omap4-sar-layout.h
@@ -20,13 +20,13 @@
20#define SAR_BANK4_OFFSET 0x3000 20#define SAR_BANK4_OFFSET 0x3000
21 21
22/* Scratch pad memory offsets from SAR_BANK1 */ 22/* Scratch pad memory offsets from SAR_BANK1 */
23#define SCU_OFFSET0 0xd00 23#define SCU_OFFSET0 0xfe4
24#define SCU_OFFSET1 0xd04 24#define SCU_OFFSET1 0xfe8
25#define OMAP_TYPE_OFFSET 0xd10 25#define OMAP_TYPE_OFFSET 0xfec
26#define L2X0_SAVE_OFFSET0 0xd14 26#define L2X0_SAVE_OFFSET0 0xff0
27#define L2X0_SAVE_OFFSET1 0xd18 27#define L2X0_SAVE_OFFSET1 0xff4
28#define L2X0_AUXCTRL_OFFSET 0xd1c 28#define L2X0_AUXCTRL_OFFSET 0xff8
29#define L2X0_PREFETCH_CTRL_OFFSET 0xd20 29#define L2X0_PREFETCH_CTRL_OFFSET 0xffc
30 30
31/* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK3 */ 31/* CPUx Wakeup Non-Secure Physical Address offsets in SAR_BANK3 */
32#define CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xa04 32#define CPU0_WAKEUP_NS_PA_ADDR_OFFSET 0xa04