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authorFelipe Contreras <felipe.contreras@gmail.com>2009-11-22 13:11:04 -0500
committerTony Lindgren <tony@atomide.com>2009-11-22 13:24:32 -0500
commita76e9a90e8dc0c8ca641a077780c6e05270d25ff (patch)
tree62cb5cdcdd139f8831729a643d26a9ab2ef22787 /arch/arm/mach-omap2/omap3-iommu.c
parent5934ba2dc04f5b3be48cb53b6a830885970f7487 (diff)
omap: iommu: reorganize
This way it's more object oriented and easier to see what is happening. No functional changes. Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap3-iommu.c')
-rw-r--r--arch/arm/mach-omap2/omap3-iommu.c62
1 files changed, 31 insertions, 31 deletions
diff --git a/arch/arm/mach-omap2/omap3-iommu.c b/arch/arm/mach-omap2/omap3-iommu.c
index 6a9bf4f59d8a..fbbcb5c83367 100644
--- a/arch/arm/mach-omap2/omap3-iommu.c
+++ b/arch/arm/mach-omap2/omap3-iommu.c
@@ -14,47 +14,50 @@
14 14
15#include <plat/iommu.h> 15#include <plat/iommu.h>
16 16
17#define OMAP3_MMU1_BASE 0x480bd400 17struct iommu_device {
18#define OMAP3_MMU2_BASE 0x5d000000 18 resource_size_t base;
19#define OMAP3_MMU1_IRQ 24 19 int irq;
20#define OMAP3_MMU2_IRQ 28 20 struct iommu_platform_data pdata;
21 21 struct resource res[2];
22
23static unsigned long iommu_base[] __initdata = {
24 OMAP3_MMU1_BASE,
25 OMAP3_MMU2_BASE,
26};
27
28static int iommu_irq[] __initdata = {
29 OMAP3_MMU1_IRQ,
30 OMAP3_MMU2_IRQ,
31}; 22};
32 23
33static const struct iommu_platform_data omap3_iommu_pdata[] __initconst = { 24static struct iommu_device devices[] = {
34 { 25 {
35 .name = "isp", 26 .base = 0x480bd400,
36 .nr_tlb_entries = 8, 27 .irq = 24,
37 .clk_name = "cam_ick", 28 .pdata = {
29 .name = "isp",
30 .nr_tlb_entries = 8,
31 .clk_name = "cam_ick",
32 },
38 }, 33 },
39#if defined(CONFIG_MPU_BRIDGE_IOMMU) 34#if defined(CONFIG_MPU_BRIDGE_IOMMU)
40 { 35 {
41 .name = "iva2", 36 .base = 0x5d000000,
42 .nr_tlb_entries = 32, 37 .irq = 28,
43 .clk_name = "iva2_ck", 38 .pdata = {
39 .name = "iva2",
40 .nr_tlb_entries = 32,
41 .clk_name = "iva2_ck",
42 },
44 }, 43 },
45#endif 44#endif
46}; 45};
47#define NR_IOMMU_DEVICES ARRAY_SIZE(omap3_iommu_pdata) 46#define NR_IOMMU_DEVICES ARRAY_SIZE(devices)
48 47
49static struct platform_device *omap3_iommu_pdev[NR_IOMMU_DEVICES]; 48static struct platform_device *omap3_iommu_pdev[NR_IOMMU_DEVICES];
50 49
51static int __init omap3_iommu_init(void) 50static int __init omap3_iommu_init(void)
52{ 51{
53 int i, err; 52 int i, err;
53 struct resource res[] = {
54 { .flags = IORESOURCE_MEM },
55 { .flags = IORESOURCE_IRQ },
56 };
54 57
55 for (i = 0; i < NR_IOMMU_DEVICES; i++) { 58 for (i = 0; i < NR_IOMMU_DEVICES; i++) {
56 struct platform_device *pdev; 59 struct platform_device *pdev;
57 struct resource res[2]; 60 const struct iommu_device *d = &devices[i];
58 61
59 pdev = platform_device_alloc("omap-iommu", i); 62 pdev = platform_device_alloc("omap-iommu", i);
60 if (!pdev) { 63 if (!pdev) {
@@ -62,19 +65,16 @@ static int __init omap3_iommu_init(void)
62 goto err_out; 65 goto err_out;
63 } 66 }
64 67
65 memset(res, 0, sizeof(res)); 68 res[0].start = d->base;
66 res[0].start = iommu_base[i]; 69 res[0].end = d->base + MMU_REG_SIZE - 1;
67 res[0].end = iommu_base[i] + MMU_REG_SIZE - 1; 70 res[1].start = res[1].end = d->irq;
68 res[0].flags = IORESOURCE_MEM;
69 res[1].start = res[1].end = iommu_irq[i];
70 res[1].flags = IORESOURCE_IRQ;
71 71
72 err = platform_device_add_resources(pdev, res, 72 err = platform_device_add_resources(pdev, res,
73 ARRAY_SIZE(res)); 73 ARRAY_SIZE(res));
74 if (err) 74 if (err)
75 goto err_out; 75 goto err_out;
76 err = platform_device_add_data(pdev, &omap3_iommu_pdata[i], 76 err = platform_device_add_data(pdev, &d->pdata,
77 sizeof(omap3_iommu_pdata[0])); 77 sizeof(d->pdata));
78 if (err) 78 if (err)
79 goto err_out; 79 goto err_out;
80 err = platform_device_add(pdev); 80 err = platform_device_add(pdev);