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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2010-06-16 12:49:49 -0400
committerKevin Hilman <khilman@ti.com>2011-12-08 14:29:00 -0500
commite97ca477e993da87769f967bd6f2602a7eab9715 (patch)
treec5268b5658949581ca659018002b73886d857ec5 /arch/arm/mach-omap2/omap-smp.c
parentb5b4f2881f619460fdb165111bac10a3dd8eebee (diff)
ARM: OMAP4: PM: CPU1 wakeup workaround from Low power modes
The SGI(Software Generated Interrupts) are not wakeup capable from low power states. This is known limitation on OMAP4 and needs to be worked around by using software forced clockdomain wake-up. CPU0 forces the CPU1 clockdomain to software force wakeup. More details can be found in OMAP4430 TRM - Version J Section : 4.3.4.2 Power States of CPU0 and CPU1 Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap-smp.c')
-rw-r--r--arch/arm/mach-omap2/omap-smp.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index ee83808de0ff..c1bf3ef0ba02 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -28,6 +28,8 @@
28 28
29#include "common.h" 29#include "common.h"
30 30
31#include "clockdomain.h"
32
31/* SCU base address */ 33/* SCU base address */
32static void __iomem *scu_base; 34static void __iomem *scu_base;
33 35
@@ -68,6 +70,8 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
68 70
69int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) 71int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
70{ 72{
73 static struct clockdomain *cpu1_clkdm;
74 static bool booted;
71 /* 75 /*
72 * Set synchronisation state between this boot processor 76 * Set synchronisation state between this boot processor
73 * and the secondary one 77 * and the secondary one
@@ -83,6 +87,29 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
83 omap_modify_auxcoreboot0(0x200, 0xfffffdff); 87 omap_modify_auxcoreboot0(0x200, 0xfffffdff);
84 flush_cache_all(); 88 flush_cache_all();
85 smp_wmb(); 89 smp_wmb();
90
91 if (!cpu1_clkdm)
92 cpu1_clkdm = clkdm_lookup("mpu1_clkdm");
93
94 /*
95 * The SGI(Software Generated Interrupts) are not wakeup capable
96 * from low power states. This is known limitation on OMAP4 and
97 * needs to be worked around by using software forced clockdomain
98 * wake-up. To wakeup CPU1, CPU0 forces the CPU1 clockdomain to
99 * software force wakeup. The clockdomain is then put back to
100 * hardware supervised mode.
101 * More details can be found in OMAP4430 TRM - Version J
102 * Section :
103 * 4.3.4.2 Power States of CPU0 and CPU1
104 */
105 if (booted) {
106 clkdm_wakeup(cpu1_clkdm);
107 clkdm_allow_idle(cpu1_clkdm);
108 } else {
109 dsb_sev();
110 booted = true;
111 }
112
86 gic_raise_softirq(cpumask_of(cpu), 1); 113 gic_raise_softirq(cpumask_of(cpu), 1);
87 114
88 /* 115 /*