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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2011-01-09 14:32:15 -0500
committerKevin Hilman <khilman@ti.com>2011-12-08 14:29:01 -0500
commit49404dd09f5dc78c247c6044c60d7be7768a71bc (patch)
treebe40b8ca0d66b048350ac57d488e39b8a5f1eec0 /arch/arm/mach-omap2/omap-mpuss-lowpower.c
parent3ba2a7393e6be48ad7f545a743cd6f46325ba8fd (diff)
ARM: OMAP4: PM: Add power domain statistics support
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Tested-by: Vishwanath BS <vishwanath.bs@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap-mpuss-lowpower.c')
-rw-r--r--arch/arm/mach-omap2/omap-mpuss-lowpower.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap-mpuss-lowpower.c b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
index 549aff1bfecb..1d5d01056558 100644
--- a/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+++ b/arch/arm/mach-omap2/omap-mpuss-lowpower.c
@@ -256,6 +256,8 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
256 return -ENXIO; 256 return -ENXIO;
257 } 257 }
258 258
259 pwrdm_pre_transition();
260
259 /* 261 /*
260 * Check MPUSS next state and save interrupt controller if needed. 262 * Check MPUSS next state and save interrupt controller if needed.
261 * In MPUSS OSWR or device OFF, interrupt controller contest is lost. 263 * In MPUSS OSWR or device OFF, interrupt controller contest is lost.
@@ -288,6 +290,8 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
288 wakeup_cpu = smp_processor_id(); 290 wakeup_cpu = smp_processor_id();
289 set_cpu_next_pwrst(wakeup_cpu, PWRDM_POWER_ON); 291 set_cpu_next_pwrst(wakeup_cpu, PWRDM_POWER_ON);
290 292
293 pwrdm_post_transition();
294
291 return 0; 295 return 0;
292} 296}
293 297