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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-10-14 17:24:42 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-10-14 17:24:42 -0400
commitb6825d2df55aa7d7341c715b577b73a6a03dc944 (patch)
treeae4f0f52f4c2ad4e501dd323318486ccdd7fcd93 /arch/arm/mach-omap2/mux.c
parent6defd90433729c2d795865165cb34d938d8ff07c (diff)
parentaa59e19d05114f9fb7718d6bc8398255476fb4f5 (diff)
Merge branch 'omap-all' into devel
Conflicts: arch/arm/mach-omap2/gpmc.c arch/arm/mach-omap2/irq.c
Diffstat (limited to 'arch/arm/mach-omap2/mux.c')
-rw-r--r--arch/arm/mach-omap2/mux.c245
1 files changed, 237 insertions, 8 deletions
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 6b7d672058b9..b1393673d95d 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/mach-omap2/mux.c 2 * linux/arch/arm/mach-omap2/mux.c
3 * 3 *
4 * OMAP2 pin multiplexing configurations 4 * OMAP2 and OMAP3 pin multiplexing configurations
5 * 5 *
6 * Copyright (C) 2004 - 2008 Texas Instruments Inc. 6 * Copyright (C) 2004 - 2008 Texas Instruments Inc.
7 * Copyright (C) 2003 - 2008 Nokia Corporation 7 * Copyright (C) 2003 - 2008 Nokia Corporation
@@ -220,16 +220,222 @@ MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1)
220#define OMAP24XX_PINS_SZ 0 220#define OMAP24XX_PINS_SZ 0
221#endif /* CONFIG_ARCH_OMAP24XX */ 221#endif /* CONFIG_ARCH_OMAP24XX */
222 222
223#define OMAP24XX_PULL_ENA (1 << 3) 223#ifdef CONFIG_ARCH_OMAP34XX
224#define OMAP24XX_PULL_UP (1 << 4) 224static struct pin_config __initdata_or_module omap34xx_pins[] = {
225/*
226 * Name, reg-offset,
227 * mux-mode | [active-mode | off-mode]
228 */
229
230/* 34xx I2C */
231MUX_CFG_34XX("K21_34XX_I2C1_SCL", 0x1ba,
232 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
233MUX_CFG_34XX("J21_34XX_I2C1_SDA", 0x1bc,
234 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
235MUX_CFG_34XX("AF15_34XX_I2C2_SCL", 0x1be,
236 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
237MUX_CFG_34XX("AE15_34XX_I2C2_SDA", 0x1c0,
238 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
239MUX_CFG_34XX("AF14_34XX_I2C3_SCL", 0x1c2,
240 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
241MUX_CFG_34XX("AG14_34XX_I2C3_SDA", 0x1c4,
242 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
243MUX_CFG_34XX("AD26_34XX_I2C4_SCL", 0xa00,
244 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
245MUX_CFG_34XX("AE26_34XX_I2C4_SDA", 0xa02,
246 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
247
248/* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
249MUX_CFG_34XX("Y8_3430_USB1HS_PHY_CLK", 0x5da,
250 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
251MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP", 0x5d8,
252 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
253MUX_CFG_34XX("AA14_3430_USB1HS_PHY_DIR", 0x5ec,
254 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
255MUX_CFG_34XX("AA11_3430_USB1HS_PHY_NXT", 0x5ee,
256 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
257MUX_CFG_34XX("W13_3430_USB1HS_PHY_D0", 0x5dc,
258 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
259MUX_CFG_34XX("W12_3430_USB1HS_PHY_D1", 0x5de,
260 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
261MUX_CFG_34XX("W11_3430_USB1HS_PHY_D2", 0x5e0,
262 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
263MUX_CFG_34XX("Y11_3430_USB1HS_PHY_D3", 0x5ea,
264 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
265MUX_CFG_34XX("W9_3430_USB1HS_PHY_D4", 0x5e4,
266 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
267MUX_CFG_34XX("Y12_3430_USB1HS_PHY_D5", 0x5e6,
268 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
269MUX_CFG_34XX("W8_3430_USB1HS_PHY_D6", 0x5e8,
270 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
271MUX_CFG_34XX("Y13_3430_USB1HS_PHY_D7", 0x5e2,
272 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
273
274/* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
275MUX_CFG_34XX("AA8_3430_USB2HS_PHY_CLK", 0x5f0,
276 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
277MUX_CFG_34XX("AA10_3430_USB2HS_PHY_STP", 0x5f2,
278 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
279MUX_CFG_34XX("AA9_3430_USB2HS_PHY_DIR", 0x5f4,
280 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
281MUX_CFG_34XX("AB11_3430_USB2HS_PHY_NXT", 0x5f6,
282 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
283MUX_CFG_34XX("AB10_3430_USB2HS_PHY_D0", 0x5f8,
284 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
285MUX_CFG_34XX("AB9_3430_USB2HS_PHY_D1", 0x5fa,
286 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
287MUX_CFG_34XX("W3_3430_USB2HS_PHY_D2", 0x1d4,
288 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
289MUX_CFG_34XX("T4_3430_USB2HS_PHY_D3", 0x1de,
290 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
291MUX_CFG_34XX("T3_3430_USB2HS_PHY_D4", 0x1d8,
292 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
293MUX_CFG_34XX("R3_3430_USB2HS_PHY_D5", 0x1da,
294 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
295MUX_CFG_34XX("R4_3430_USB2HS_PHY_D6", 0x1dc,
296 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
297MUX_CFG_34XX("T2_3430_USB2HS_PHY_D7", 0x1d6,
298 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
299
300/* TLL - HSUSB: 12-pin TLL Port 1*/
301MUX_CFG_34XX("Y8_3430_USB1HS_TLL_CLK", 0x5da,
302 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
303MUX_CFG_34XX("Y9_3430_USB1HS_TLL_STP", 0x5d8,
304 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP)
305MUX_CFG_34XX("AA14_3430_USB1HS_TLL_DIR", 0x5ec,
306 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
307MUX_CFG_34XX("AA11_3430_USB1HS_TLL_NXT", 0x5ee,
308 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
309MUX_CFG_34XX("W13_3430_USB1HS_TLL_D0", 0x5dc,
310 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
311MUX_CFG_34XX("W12_3430_USB1HS_TLL_D1", 0x5de,
312 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
313MUX_CFG_34XX("W11_3430_USB1HS_TLL_D2", 0x5e0,
314 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
315MUX_CFG_34XX("Y11_3430_USB1HS_TLL_D3", 0x5ea,
316 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
317MUX_CFG_34XX("W9_3430_USB1HS_TLL_D4", 0x5e4,
318 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
319MUX_CFG_34XX("Y12_3430_USB1HS_TLL_D5", 0x5e6,
320 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
321MUX_CFG_34XX("W8_3430_USB1HS_TLL_D6", 0x5e8,
322 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
323MUX_CFG_34XX("Y13_3430_USB1HS_TLL_D7", 0x5e2,
324 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
325
326/* TLL - HSUSB: 12-pin TLL Port 2*/
327MUX_CFG_34XX("AA8_3430_USB2HS_TLL_CLK", 0x5f0,
328 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
329MUX_CFG_34XX("AA10_3430_USB2HS_TLL_STP", 0x5f2,
330 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP)
331MUX_CFG_34XX("AA9_3430_USB2HS_TLL_DIR", 0x5f4,
332 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
333MUX_CFG_34XX("AB11_3430_USB2HS_TLL_NXT", 0x5f6,
334 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
335MUX_CFG_34XX("AB10_3430_USB2HS_TLL_D0", 0x5f8,
336 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
337MUX_CFG_34XX("AB9_3430_USB2HS_TLL_D1", 0x5fa,
338 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
339MUX_CFG_34XX("W3_3430_USB2HS_TLL_D2", 0x1d4,
340 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
341MUX_CFG_34XX("T4_3430_USB2HS_TLL_D3", 0x1de,
342 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
343MUX_CFG_34XX("T3_3430_USB2HS_TLL_D4", 0x1d8,
344 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
345MUX_CFG_34XX("R3_3430_USB2HS_TLL_D5", 0x1da,
346 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
347MUX_CFG_34XX("R4_3430_USB2HS_TLL_D6", 0x1dc,
348 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
349MUX_CFG_34XX("T2_3430_USB2HS_TLL_D7", 0x1d6,
350 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
351
352/* TLL - HSUSB: 12-pin TLL Port 3*/
353MUX_CFG_34XX("AA6_3430_USB3HS_TLL_CLK", 0x180,
354 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
355MUX_CFG_34XX("AB3_3430_USB3HS_TLL_STP", 0x166,
356 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLUP)
357MUX_CFG_34XX("AA3_3430_USB3HS_TLL_DIR", 0x168,
358 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
359MUX_CFG_34XX("Y3_3430_USB3HS_TLL_NXT", 0x16a,
360 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
361MUX_CFG_34XX("AA5_3430_USB3HS_TLL_D0", 0x186,
362 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
363MUX_CFG_34XX("Y4_3430_USB3HS_TLL_D1", 0x184,
364 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
365MUX_CFG_34XX("Y5_3430_USB3HS_TLL_D2", 0x188,
366 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
367MUX_CFG_34XX("W5_3430_USB3HS_TLL_D3", 0x18a,
368 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
369MUX_CFG_34XX("AB12_3430_USB3HS_TLL_D4", 0x16c,
370 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
371MUX_CFG_34XX("AB13_3430_USB3HS_TLL_D5", 0x16e,
372 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
373MUX_CFG_34XX("AA13_3430_USB3HS_TLL_D6", 0x170,
374 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
375MUX_CFG_34XX("AA12_3430_USB3HS_TLL_D7", 0x172,
376 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
377
378/* PHY FSUSB: FS Serial for Port 1 (multiple PHY modes supported) */
379MUX_CFG_34XX("AF10_3430_USB1FS_PHY_MM1_RXDP", 0x5d8,
380 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
381MUX_CFG_34XX("AG9_3430_USB1FS_PHY_MM1_RXDM", 0x5ee,
382 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
383MUX_CFG_34XX("W13_3430_USB1FS_PHY_MM1_RXRCV", 0x5dc,
384 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
385MUX_CFG_34XX("W12_3430_USB1FS_PHY_MM1_TXSE0", 0x5de,
386 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
387MUX_CFG_34XX("W11_3430_USB1FS_PHY_MM1_TXDAT", 0x5e0,
388 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
389MUX_CFG_34XX("Y11_3430_USB1FS_PHY_MM1_TXEN_N", 0x5ea,
390 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT)
391
392/* PHY FSUSB: FS Serial for Port 2 (multiple PHY modes supported) */
393MUX_CFG_34XX("AF7_3430_USB2FS_PHY_MM2_RXDP", 0x5f2,
394 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
395MUX_CFG_34XX("AH7_3430_USB2FS_PHY_MM2_RXDM", 0x5f6,
396 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
397MUX_CFG_34XX("AB10_3430_USB2FS_PHY_MM2_RXRCV", 0x5f8,
398 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
399MUX_CFG_34XX("AB9_3430_USB2FS_PHY_MM2_TXSE0", 0x5fa,
400 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
401MUX_CFG_34XX("W3_3430_USB2FS_PHY_MM2_TXDAT", 0x1d4,
402 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
403MUX_CFG_34XX("T4_3430_USB2FS_PHY_MM2_TXEN_N", 0x1de,
404 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT)
405
406/* PHY FSUSB: FS Serial for Port 3 (multiple PHY modes supported) */
407MUX_CFG_34XX("AH3_3430_USB3FS_PHY_MM3_RXDP", 0x166,
408 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
409MUX_CFG_34XX("AE3_3430_USB3FS_PHY_MM3_RXDM", 0x16a,
410 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
411MUX_CFG_34XX("AD1_3430_USB3FS_PHY_MM3_RXRCV", 0x186,
412 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
413MUX_CFG_34XX("AE1_3430_USB3FS_PHY_MM3_TXSE0", 0x184,
414 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
415MUX_CFG_34XX("AD2_3430_USB3FS_PHY_MM3_TXDAT", 0x188,
416 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
417MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a,
418 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT)
419
420};
421
422#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
423
424#else
425#define omap34xx_pins NULL
426#define OMAP34XX_PINS_SZ 0
427#endif /* CONFIG_ARCH_OMAP34XX */
225 428
226#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) 429#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
227void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u8 reg) 430static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 reg)
228{ 431{
229 u16 orig; 432 u16 orig;
230 u8 warn = 0, debug = 0; 433 u8 warn = 0, debug = 0;
231 434
232 orig = omap_ctrl_readb(cfg->mux_reg); 435 if (cpu_is_omap24xx())
436 orig = omap_ctrl_readb(cfg->mux_reg);
437 else
438 orig = omap_ctrl_readw(cfg->mux_reg);
233 439
234#ifdef CONFIG_OMAP_MUX_DEBUG 440#ifdef CONFIG_OMAP_MUX_DEBUG
235 debug = cfg->debug; 441 debug = cfg->debug;
@@ -255,9 +461,9 @@ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
255 spin_lock_irqsave(&mux_spin_lock, flags); 461 spin_lock_irqsave(&mux_spin_lock, flags);
256 reg |= cfg->mask & 0x7; 462 reg |= cfg->mask & 0x7;
257 if (cfg->pull_val) 463 if (cfg->pull_val)
258 reg |= OMAP24XX_PULL_ENA; 464 reg |= OMAP2_PULL_ENA;
259 if (cfg->pu_pd_val) 465 if (cfg->pu_pd_val)
260 reg |= OMAP24XX_PULL_UP; 466 reg |= OMAP2_PULL_UP;
261 omap2_cfg_debug(cfg, reg); 467 omap2_cfg_debug(cfg, reg);
262 omap_ctrl_writeb(reg, cfg->mux_reg); 468 omap_ctrl_writeb(reg, cfg->mux_reg);
263 spin_unlock_irqrestore(&mux_spin_lock, flags); 469 spin_unlock_irqrestore(&mux_spin_lock, flags);
@@ -265,7 +471,26 @@ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
265 return 0; 471 return 0;
266} 472}
267#else 473#else
268#define omap24xx_cfg_reg 0 474#define omap24xx_cfg_reg NULL
475#endif
476
477#ifdef CONFIG_ARCH_OMAP34XX
478static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
479{
480 static DEFINE_SPINLOCK(mux_spin_lock);
481 unsigned long flags;
482 u16 reg = 0;
483
484 spin_lock_irqsave(&mux_spin_lock, flags);
485 reg |= cfg->mux_val;
486 omap2_cfg_debug(cfg, reg);
487 omap_ctrl_writew(reg, cfg->mux_reg);
488 spin_unlock_irqrestore(&mux_spin_lock, flags);
489
490 return 0;
491}
492#else
493#define omap34xx_cfg_reg NULL
269#endif 494#endif
270 495
271int __init omap2_mux_init(void) 496int __init omap2_mux_init(void)
@@ -274,6 +499,10 @@ int __init omap2_mux_init(void)
274 arch_mux_cfg.pins = omap24xx_pins; 499 arch_mux_cfg.pins = omap24xx_pins;
275 arch_mux_cfg.size = OMAP24XX_PINS_SZ; 500 arch_mux_cfg.size = OMAP24XX_PINS_SZ;
276 arch_mux_cfg.cfg_reg = omap24xx_cfg_reg; 501 arch_mux_cfg.cfg_reg = omap24xx_cfg_reg;
502 } else if (cpu_is_omap34xx()) {
503 arch_mux_cfg.pins = omap34xx_pins;
504 arch_mux_cfg.size = OMAP34XX_PINS_SZ;
505 arch_mux_cfg.cfg_reg = omap34xx_cfg_reg;
277 } 506 }
278 507
279 return omap_mux_register(&arch_mux_cfg); 508 return omap_mux_register(&arch_mux_cfg);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-18 22:28:38 -0500