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authorVikram Pandita <vikram.pandita@ti.com>2008-10-06 08:49:16 -0400
committerTony Lindgren <tony@atomide.com>2008-10-06 08:49:16 -0400
commit2351872c44be50c27001bbfa91d6e14e3cee8b88 (patch)
treed1e703382191b27760023e88dac3750395fab659 /arch/arm/mach-omap2/mux.c
parent0e564848693b06b037ec05e68c9e4b266250789e (diff)
ARM: OMAP2: Add pinmux support for omap34xx
This patch adds pinmux support for OMAP3. Incorporated review comments from Tony to make mux_value as bit mask. Tested on 3430SDP. Also merge in adding of I2C pins from Jarkko Nikula. Acked-by: Anand Gadiyar <gadiyar@ti.com> Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/mux.c')
-rw-r--r--arch/arm/mach-omap2/mux.c202
1 files changed, 194 insertions, 8 deletions
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 443d07fef7f3..6188e2f97854 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/arch/arm/mach-omap2/mux.c 2 * linux/arch/arm/mach-omap2/mux.c
3 * 3 *
4 * OMAP2 pin multiplexing configurations 4 * OMAP2 and OMAP3 pin multiplexing configurations
5 * 5 *
6 * Copyright (C) 2004 - 2008 Texas Instruments Inc. 6 * Copyright (C) 2004 - 2008 Texas Instruments Inc.
7 * Copyright (C) 2003 - 2008 Nokia Corporation 7 * Copyright (C) 2003 - 2008 Nokia Corporation
@@ -219,16 +219,179 @@ MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0, 0, 0, 1)
219#define OMAP24XX_PINS_SZ 0 219#define OMAP24XX_PINS_SZ 0
220#endif /* CONFIG_ARCH_OMAP24XX */ 220#endif /* CONFIG_ARCH_OMAP24XX */
221 221
222#define OMAP24XX_PULL_ENA (1 << 3) 222#ifdef CONFIG_ARCH_OMAP34XX
223#define OMAP24XX_PULL_UP (1 << 4) 223static struct pin_config __initdata_or_module omap34xx_pins[] = {
224/*
225 * Name, reg-offset,
226 * mux-mode | [active-mode | off-mode]
227 */
228
229/* 34xx I2C */
230MUX_CFG_34XX("K21_34XX_I2C1_SCL", 0x1ba,
231 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
232MUX_CFG_34XX("J21_34XX_I2C1_SDA", 0x1bc,
233 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
234MUX_CFG_34XX("AF15_34XX_I2C2_SCL", 0x1be,
235 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
236MUX_CFG_34XX("AE15_34XX_I2C2_SDA", 0x1c0,
237 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
238MUX_CFG_34XX("AF14_34XX_I2C3_SCL", 0x1c2,
239 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
240MUX_CFG_34XX("AG14_34XX_I2C3_SDA", 0x1c4,
241 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
242MUX_CFG_34XX("AD26_34XX_I2C4_SCL", 0xa00,
243 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
244MUX_CFG_34XX("AE26_34XX_I2C4_SDA", 0xa02,
245 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
246
247/* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
248MUX_CFG_34XX("Y8_3430_USB1HS_PHY_CLK", 0x5da,
249 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
250MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP", 0x5d8,
251 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
252MUX_CFG_34XX("AA14_3430_USB1HS_PHY_DIR", 0x5ec,
253 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
254MUX_CFG_34XX("AA11_3430_USB1HS_PHY_NXT", 0x5ee,
255 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
256MUX_CFG_34XX("W13_3430_USB1HS_PHY_D0", 0x5dc,
257 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
258MUX_CFG_34XX("W12_3430_USB1HS_PHY_D1", 0x5de,
259 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
260MUX_CFG_34XX("W11_3430_USB1HS_PHY_D2", 0x5e0,
261 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
262MUX_CFG_34XX("Y11_3430_USB1HS_PHY_D3", 0x5ea,
263 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
264MUX_CFG_34XX("W9_3430_USB1HS_PHY_D4", 0x5e4,
265 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
266MUX_CFG_34XX("Y12_3430_USB1HS_PHY_D5", 0x5e6,
267 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
268MUX_CFG_34XX("W8_3430_USB1HS_PHY_D6", 0x5e8,
269 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
270MUX_CFG_34XX("Y13_3430_USB1HS_PHY_D7", 0x5e2,
271 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
272
273/* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
274MUX_CFG_34XX("AA8_3430_USB2HS_PHY_CLK", 0x5f0,
275 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
276MUX_CFG_34XX("AA10_3430_USB2HS_PHY_STP", 0x5f2,
277 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
278MUX_CFG_34XX("AA9_3430_USB2HS_PHY_DIR", 0x5f4,
279 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
280MUX_CFG_34XX("AB11_3430_USB2HS_PHY_NXT", 0x5f6,
281 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
282MUX_CFG_34XX("AB10_3430_USB2HS_PHY_D0", 0x5f8,
283 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
284MUX_CFG_34XX("AB9_3430_USB2HS_PHY_D1", 0x5fa,
285 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
286MUX_CFG_34XX("W3_3430_USB2HS_PHY_D2", 0x1d4,
287 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
288MUX_CFG_34XX("T4_3430_USB2HS_PHY_D3", 0x1de,
289 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
290MUX_CFG_34XX("T3_3430_USB2HS_PHY_D4", 0x1d8,
291 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
292MUX_CFG_34XX("R3_3430_USB2HS_PHY_D5", 0x1da,
293 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
294MUX_CFG_34XX("R4_3430_USB2HS_PHY_D6", 0x1dc,
295 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
296MUX_CFG_34XX("T2_3430_USB2HS_PHY_D7", 0x1d6,
297 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
298
299/* TLL - HSUSB: 12-pin TLL Port 1*/
300MUX_CFG_34XX("Y8_3430_USB1HS_TLL_CLK", 0x5da,
301 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT)
302MUX_CFG_34XX("Y9_3430_USB1HS_TLL_STP", 0x5d8,
303 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
304MUX_CFG_34XX("AA14_3430_USB1HS_TLL_DIR", 0x5ec,
305 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT)
306MUX_CFG_34XX("AA11_3430_USB1HS_TLL_NXT", 0x5ee,
307 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT)
308MUX_CFG_34XX("W13_3430_USB1HS_TLL_D0", 0x5dc,
309 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
310MUX_CFG_34XX("W12_3430_USB1HS_TLL_D1", 0x5de,
311 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
312MUX_CFG_34XX("W11_3430_USB1HS_TLL_D2", 0x5e0,
313 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
314MUX_CFG_34XX("Y11_3430_USB1HS_TLL_D3", 0x5ea,
315 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
316MUX_CFG_34XX("W9_3430_USB1HS_TLL_D4", 0x5e4,
317 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
318MUX_CFG_34XX("Y12_3430_USB1HS_TLL_D5", 0x5e6,
319 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
320MUX_CFG_34XX("W8_3430_USB1HS_TLL_D6", 0x5e8,
321 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
322MUX_CFG_34XX("Y13_3430_USB1HS_TLL_D7", 0x5e2,
323 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
324
325/* TLL - HSUSB: 12-pin TLL Port 2*/
326MUX_CFG_34XX("AA8_3430_USB2HS_TLL_CLK", 0x5f0,
327 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT)
328MUX_CFG_34XX("AA10_3430_USB2HS_TLL_STP", 0x5f2,
329 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
330MUX_CFG_34XX("AA9_3430_USB2HS_TLL_DIR", 0x5f4,
331 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT)
332MUX_CFG_34XX("AB11_3430_USB2HS_TLL_NXT", 0x5f6,
333 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT)
334MUX_CFG_34XX("AB10_3430_USB2HS_TLL_D0", 0x5f8,
335 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
336MUX_CFG_34XX("AB9_3430_USB2HS_TLL_D1", 0x5fa,
337 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
338MUX_CFG_34XX("W3_3430_USB2HS_TLL_D2", 0x1d4,
339 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
340MUX_CFG_34XX("T4_3430_USB2HS_TLL_D3", 0x1de,
341 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
342MUX_CFG_34XX("T3_3430_USB2HS_TLL_D4", 0x1d8,
343 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
344MUX_CFG_34XX("R3_3430_USB2HS_TLL_D5", 0x1da,
345 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
346MUX_CFG_34XX("R4_3430_USB2HS_TLL_D6", 0x1dc,
347 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
348MUX_CFG_34XX("T2_3430_USB2HS_TLL_D7", 0x1d6,
349 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
350
351/* TLL - HSUSB: 12-pin TLL Port 3*/
352MUX_CFG_34XX("AA6_3430_USB3HS_TLL_CLK", 0x180,
353 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT)
354MUX_CFG_34XX("AB3_3430_USB3HS_TLL_STP", 0x166,
355 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
356MUX_CFG_34XX("AA3_3430_USB3HS_TLL_DIR", 0x168,
357 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT)
358MUX_CFG_34XX("Y3_3430_USB3HS_TLL_NXT", 0x16a,
359 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT)
360MUX_CFG_34XX("AA5_3430_USB3HS_TLL_D0", 0x186,
361 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
362MUX_CFG_34XX("Y4_3430_USB3HS_TLL_D1", 0x184,
363 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
364MUX_CFG_34XX("Y5_3430_USB3HS_TLL_D2", 0x188,
365 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
366MUX_CFG_34XX("W5_3430_USB3HS_TLL_D3", 0x18a,
367 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
368MUX_CFG_34XX("AB12_3430_USB3HS_TLL_D4", 0x16c,
369 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
370MUX_CFG_34XX("AB13_3430_USB3HS_TLL_D5", 0x16e,
371 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
372MUX_CFG_34XX("AA13_3430_USB3HS_TLL_D6", 0x170,
373 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
374MUX_CFG_34XX("AA12_3430_USB3HS_TLL_D7", 0x172,
375 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
376};
377
378#define OMAP34XX_PINS_SZ ARRAY_SIZE(omap34xx_pins)
379
380#else
381#define omap34xx_pins NULL
382#define OMAP34XX_PINS_SZ 0
383#endif /* CONFIG_ARCH_OMAP34XX */
224 384
225#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) 385#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
226void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u8 reg) 386static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 reg)
227{ 387{
228 u16 orig; 388 u16 orig;
229 u8 warn = 0, debug = 0; 389 u8 warn = 0, debug = 0;
230 390
231 orig = omap_ctrl_readb(cfg->mux_reg); 391 if (cpu_is_omap24xx())
392 orig = omap_ctrl_readb(cfg->mux_reg);
393 else
394 orig = omap_ctrl_readw(cfg->mux_reg);
232 395
233#ifdef CONFIG_OMAP_MUX_DEBUG 396#ifdef CONFIG_OMAP_MUX_DEBUG
234 debug = cfg->debug; 397 debug = cfg->debug;
@@ -254,9 +417,9 @@ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
254 spin_lock_irqsave(&mux_spin_lock, flags); 417 spin_lock_irqsave(&mux_spin_lock, flags);
255 reg |= cfg->mask & 0x7; 418 reg |= cfg->mask & 0x7;
256 if (cfg->pull_val) 419 if (cfg->pull_val)
257 reg |= OMAP24XX_PULL_ENA; 420 reg |= OMAP2_PULL_ENA;
258 if (cfg->pu_pd_val) 421 if (cfg->pu_pd_val)
259 reg |= OMAP24XX_PULL_UP; 422 reg |= OMAP2_PULL_UP;
260 omap2_cfg_debug(cfg, reg); 423 omap2_cfg_debug(cfg, reg);
261 omap_ctrl_writeb(reg, cfg->mux_reg); 424 omap_ctrl_writeb(reg, cfg->mux_reg);
262 spin_unlock_irqrestore(&mux_spin_lock, flags); 425 spin_unlock_irqrestore(&mux_spin_lock, flags);
@@ -264,7 +427,26 @@ int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
264 return 0; 427 return 0;
265} 428}
266#else 429#else
267#define omap24xx_cfg_reg 0 430#define omap24xx_cfg_reg NULL
431#endif
432
433#ifdef CONFIG_ARCH_OMAP34XX
434static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
435{
436 static DEFINE_SPINLOCK(mux_spin_lock);
437 unsigned long flags;
438 u16 reg = 0;
439
440 spin_lock_irqsave(&mux_spin_lock, flags);
441 reg |= cfg->mux_val;
442 omap2_cfg_debug(cfg, reg);
443 omap_ctrl_writew(reg, cfg->mux_reg);
444 spin_unlock_irqrestore(&mux_spin_lock, flags);
445
446 return 0;
447}
448#else
449#define omap34xx_cfg_reg NULL
268#endif 450#endif
269 451
270int __init omap2_mux_init(void) 452int __init omap2_mux_init(void)
@@ -273,6 +455,10 @@ int __init omap2_mux_init(void)
273 arch_mux_cfg.pins = omap24xx_pins; 455 arch_mux_cfg.pins = omap24xx_pins;
274 arch_mux_cfg.size = OMAP24XX_PINS_SZ; 456 arch_mux_cfg.size = OMAP24XX_PINS_SZ;
275 arch_mux_cfg.cfg_reg = omap24xx_cfg_reg; 457 arch_mux_cfg.cfg_reg = omap24xx_cfg_reg;
458 } else if (cpu_is_omap34xx()) {
459 arch_mux_cfg.pins = omap34xx_pins;
460 arch_mux_cfg.size = OMAP34XX_PINS_SZ;
461 arch_mux_cfg.cfg_reg = omap34xx_cfg_reg;
276 } 462 }
277 463
278 return omap_mux_register(&arch_mux_cfg); 464 return omap_mux_register(&arch_mux_cfg);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-18 22:33:21 -0500