aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/mmc-twl4030.c
diff options
context:
space:
mode:
authorDavid Brownell <dbrownell@users.sourceforge.net>2009-05-28 17:04:03 -0400
committerTony Lindgren <tony@atomide.com>2009-05-28 17:04:03 -0400
commitb583f26d510ee1aef7348f38f1d959212f66b5e5 (patch)
tree23b79b4078535b91ac9d4471916fec08e68fbe18 /arch/arm/mach-omap2/mmc-twl4030.c
parent4a899d5e93fd974952492cd4a09e98b209d1ad58 (diff)
ARM: OMAP3: mmc-twl4030 uses regulator framework
Decouple the HSMMC glue from the twl4030 as the only regulator provider, using the regulator framework instead. This makes the glue's "mmc-twl4030" name become a complete misnomer ... this code could probably all migrate into the HSMMC driver now. Tested on 3430SDP (SD and low-voltage MMC) and Beagle (SD), plus some other boards (including Overo) after they were converted to set up MMC regulators properly. Eventually all boards should just associate a regulator with each MMC controller they use. In some cases (Overo MMC2 and Pandora MMC3, at least) that would be a fixed-voltage regulator with no real software control. As a temporary hack (pending regulator-next updates to make the "fixed.c" regulator become usable) there's a new ocr_mask field for those boards. Patch updated with a fix for disabling vcc_aux by Adrian Hunter <adrian.hunter@nokia.com> Cc: Pierre Ossman <drzeus-list@drzeus.cx> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/mmc-twl4030.c')
-rw-r--r--arch/arm/mach-omap2/mmc-twl4030.c280
1 files changed, 113 insertions, 167 deletions
diff --git a/arch/arm/mach-omap2/mmc-twl4030.c b/arch/arm/mach-omap2/mmc-twl4030.c
index dc40b3e72206..9756a878fd90 100644
--- a/arch/arm/mach-omap2/mmc-twl4030.c
+++ b/arch/arm/mach-omap2/mmc-twl4030.c
@@ -16,8 +16,8 @@
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/gpio.h> 18#include <linux/gpio.h>
19#include <linux/i2c/twl4030.h> 19#include <linux/mmc/host.h>
20#include <linux/regulator/machine.h> 20#include <linux/regulator/consumer.h>
21 21
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <mach/control.h> 23#include <mach/control.h>
@@ -26,31 +26,9 @@
26 26
27#include "mmc-twl4030.h" 27#include "mmc-twl4030.h"
28 28
29#if defined(CONFIG_TWL4030_CORE) && \
30 (defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE))
31 29
32#define LDO_CLR 0x00 30#if defined(CONFIG_REGULATOR) && \
33#define VSEL_S2_CLR 0x40 31 (defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE))
34
35#define VMMC1_DEV_GRP 0x27
36#define VMMC1_CLR 0x00
37#define VMMC1_315V 0x03
38#define VMMC1_300V 0x02
39#define VMMC1_285V 0x01
40#define VMMC1_185V 0x00
41#define VMMC1_DEDICATED 0x2A
42
43#define VMMC2_DEV_GRP 0x2B
44#define VMMC2_CLR 0x40
45#define VMMC2_315V 0x0c
46#define VMMC2_300V 0x0b
47#define VMMC2_285V 0x0a
48#define VMMC2_280V 0x09
49#define VMMC2_260V 0x08
50#define VMMC2_185V 0x06
51#define VMMC2_DEDICATED 0x2E
52
53#define VMMC_DEV_GRP_P1 0x20
54 32
55static u16 control_pbias_offset; 33static u16 control_pbias_offset;
56static u16 control_devconf1_offset; 34static u16 control_devconf1_offset;
@@ -59,19 +37,16 @@ static u16 control_devconf1_offset;
59 37
60static struct twl_mmc_controller { 38static struct twl_mmc_controller {
61 struct omap_mmc_platform_data *mmc; 39 struct omap_mmc_platform_data *mmc;
62 u8 twl_vmmc_dev_grp; 40 /* Vcc == configured supply
63 u8 twl_mmc_dedicated; 41 * Vcc_alt == optional
64 char name[HSMMC_NAME_LEN + 1]; 42 * - MMC1, supply for DAT4..DAT7
65} hsmmc[OMAP34XX_NR_MMC] = { 43 * - MMC2/MMC2, external level shifter voltage supply, for
66 { 44 * chip (SDIO, eMMC, etc) or transceiver (MMC2 only)
67 .twl_vmmc_dev_grp = VMMC1_DEV_GRP, 45 */
68 .twl_mmc_dedicated = VMMC1_DEDICATED, 46 struct regulator *vcc;
69 }, 47 struct regulator *vcc_aux;
70 { 48 char name[HSMMC_NAME_LEN + 1];
71 .twl_vmmc_dev_grp = VMMC2_DEV_GRP, 49} hsmmc[OMAP34XX_NR_MMC];
72 .twl_mmc_dedicated = VMMC2_DEDICATED,
73 },
74};
75 50
76static int twl_mmc_card_detect(int irq) 51static int twl_mmc_card_detect(int irq)
77{ 52{
@@ -117,16 +92,60 @@ static int twl_mmc_late_init(struct device *dev)
117 int ret = 0; 92 int ret = 0;
118 int i; 93 int i;
119 94
120 ret = gpio_request(mmc->slots[0].switch_pin, "mmc_cd"); 95 /* MMC/SD/SDIO doesn't require a card detect switch */
121 if (ret) 96 if (gpio_is_valid(mmc->slots[0].switch_pin)) {
122 goto done; 97 ret = gpio_request(mmc->slots[0].switch_pin, "mmc_cd");
123 ret = gpio_direction_input(mmc->slots[0].switch_pin); 98 if (ret)
124 if (ret) 99 goto done;
125 goto err; 100 ret = gpio_direction_input(mmc->slots[0].switch_pin);
101 if (ret)
102 goto err;
103 }
126 104
105 /* require at least main regulator */
127 for (i = 0; i < ARRAY_SIZE(hsmmc); i++) { 106 for (i = 0; i < ARRAY_SIZE(hsmmc); i++) {
128 if (hsmmc[i].name == mmc->slots[0].name) { 107 if (hsmmc[i].name == mmc->slots[0].name) {
108 struct regulator *reg;
109
129 hsmmc[i].mmc = mmc; 110 hsmmc[i].mmc = mmc;
111
112 reg = regulator_get(dev, "vmmc");
113 if (IS_ERR(reg)) {
114 dev_dbg(dev, "vmmc regulator missing\n");
115 /* HACK: until fixed.c regulator is usable,
116 * we don't require a main regulator
117 * for MMC2 or MMC3
118 */
119 if (i != 0)
120 break;
121 ret = PTR_ERR(reg);
122 goto err;
123 }
124 hsmmc[i].vcc = reg;
125 mmc->slots[0].ocr_mask = mmc_regulator_get_ocrmask(reg);
126
127 /* allow an aux regulator */
128 reg = regulator_get(dev, "vmmc_aux");
129 hsmmc[i].vcc_aux = IS_ERR(reg) ? NULL : reg;
130
131 /* UGLY HACK: workaround regulator framework bugs.
132 * When the bootloader leaves a supply active, it's
133 * initialized with zero usecount ... and we can't
134 * disable it without first enabling it. Until the
135 * framework is fixed, we need a workaround like this
136 * (which is safe for MMC, but not in general).
137 */
138 if (regulator_is_enabled(hsmmc[i].vcc) > 0) {
139 regulator_enable(hsmmc[i].vcc);
140 regulator_disable(hsmmc[i].vcc);
141 }
142 if (hsmmc[i].vcc_aux) {
143 if (regulator_is_enabled(reg) > 0) {
144 regulator_enable(reg);
145 regulator_disable(reg);
146 }
147 }
148
130 break; 149 break;
131 } 150 }
132 } 151 }
@@ -173,96 +192,6 @@ static int twl_mmc_resume(struct device *dev, int slot)
173#define twl_mmc_resume NULL 192#define twl_mmc_resume NULL
174#endif 193#endif
175 194
176/*
177 * Sets the MMC voltage in twl4030
178 */
179
180#define MMC1_OCR (MMC_VDD_165_195 \
181 |MMC_VDD_28_29|MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32)
182#define MMC2_OCR (MMC_VDD_165_195 \
183 |MMC_VDD_25_26|MMC_VDD_26_27|MMC_VDD_27_28 \
184 |MMC_VDD_28_29|MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32)
185
186static int twl_mmc_set_voltage(struct twl_mmc_controller *c, int vdd)
187{
188 int ret;
189 u8 vmmc = 0, dev_grp_val;
190
191 if (!vdd)
192 goto doit;
193
194 if (c->twl_vmmc_dev_grp == VMMC1_DEV_GRP) {
195 /* VMMC1: max 220 mA. And for 8-bit mode,
196 * VSIM: max 50 mA
197 */
198 switch (1 << vdd) {
199 case MMC_VDD_165_195:
200 vmmc = VMMC1_185V;
201 /* and VSIM_180V */
202 break;
203 case MMC_VDD_28_29:
204 vmmc = VMMC1_285V;
205 /* and VSIM_280V */
206 break;
207 case MMC_VDD_29_30:
208 case MMC_VDD_30_31:
209 vmmc = VMMC1_300V;
210 /* and VSIM_300V */
211 break;
212 case MMC_VDD_31_32:
213 vmmc = VMMC1_315V;
214 /* error if VSIM needed */
215 break;
216 default:
217 return -EINVAL;
218 }
219 } else if (c->twl_vmmc_dev_grp == VMMC2_DEV_GRP) {
220 /* VMMC2: max 100 mA */
221 switch (1 << vdd) {
222 case MMC_VDD_165_195:
223 vmmc = VMMC2_185V;
224 break;
225 case MMC_VDD_25_26:
226 case MMC_VDD_26_27:
227 vmmc = VMMC2_260V;
228 break;
229 case MMC_VDD_27_28:
230 vmmc = VMMC2_280V;
231 break;
232 case MMC_VDD_28_29:
233 vmmc = VMMC2_285V;
234 break;
235 case MMC_VDD_29_30:
236 case MMC_VDD_30_31:
237 vmmc = VMMC2_300V;
238 break;
239 case MMC_VDD_31_32:
240 vmmc = VMMC2_315V;
241 break;
242 default:
243 return -EINVAL;
244 }
245 } else {
246 return -EINVAL;
247 }
248
249doit:
250 if (vdd)
251 dev_grp_val = VMMC_DEV_GRP_P1; /* Power up */
252 else
253 dev_grp_val = LDO_CLR; /* Power down */
254
255 ret = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
256 dev_grp_val, c->twl_vmmc_dev_grp);
257 if (ret || !vdd)
258 return ret;
259
260 ret = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
261 vmmc, c->twl_mmc_dedicated);
262
263 return ret;
264}
265
266static int twl_mmc1_set_power(struct device *dev, int slot, int power_on, 195static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
267 int vdd) 196 int vdd)
268{ 197{
@@ -273,11 +202,13 @@ static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
273 202
274 /* 203 /*
275 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the 204 * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
276 * card using the same TWL VMMC1 supply (hsmmc[0]); OMAP has both 205 * card with Vcc regulator (from twl4030 or whatever). OMAP has both
277 * 1.8V and 3.0V modes, controlled by the PBIAS register. 206 * 1.8V and 3.0V modes, controlled by the PBIAS register.
278 * 207 *
279 * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which 208 * In 8-bit modes, OMAP VMMC1A (for DAT4..7) needs a supply, which
280 * is most naturally TWL VSIM; those pins also use PBIAS. 209 * is most naturally TWL VSIM; those pins also use PBIAS.
210 *
211 * FIXME handle VMMC1A as needed ...
281 */ 212 */
282 if (power_on) { 213 if (power_on) {
283 if (cpu_is_omap2430()) { 214 if (cpu_is_omap2430()) {
@@ -300,7 +231,7 @@ static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
300 reg &= ~OMAP2_PBIASLITEPWRDNZ0; 231 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
301 omap_ctrl_writel(reg, control_pbias_offset); 232 omap_ctrl_writel(reg, control_pbias_offset);
302 233
303 ret = twl_mmc_set_voltage(c, vdd); 234 ret = mmc_regulator_set_ocr(c->vcc, vdd);
304 235
305 /* 100ms delay required for PBIAS configuration */ 236 /* 100ms delay required for PBIAS configuration */
306 msleep(100); 237 msleep(100);
@@ -316,7 +247,7 @@ static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
316 reg &= ~OMAP2_PBIASLITEPWRDNZ0; 247 reg &= ~OMAP2_PBIASLITEPWRDNZ0;
317 omap_ctrl_writel(reg, control_pbias_offset); 248 omap_ctrl_writel(reg, control_pbias_offset);
318 249
319 ret = twl_mmc_set_voltage(c, 0); 250 ret = mmc_regulator_set_ocr(c->vcc, 0);
320 251
321 /* 100ms delay required for PBIAS configuration */ 252 /* 100ms delay required for PBIAS configuration */
322 msleep(100); 253 msleep(100);
@@ -329,19 +260,33 @@ static int twl_mmc1_set_power(struct device *dev, int slot, int power_on,
329 return ret; 260 return ret;
330} 261}
331 262
332static int twl_mmc2_set_power(struct device *dev, int slot, int power_on, int vdd) 263static int twl_mmc23_set_power(struct device *dev, int slot, int power_on, int vdd)
333{ 264{
334 int ret; 265 int ret = 0;
335 struct twl_mmc_controller *c = &hsmmc[1]; 266 struct twl_mmc_controller *c = &hsmmc[1];
336 struct omap_mmc_platform_data *mmc = dev->platform_data; 267 struct omap_mmc_platform_data *mmc = dev->platform_data;
337 268
269 /* If we don't see a Vcc regulator, assume it's a fixed
270 * voltage always-on regulator.
271 */
272 if (!c->vcc)
273 return 0;
274
338 /* 275 /*
339 * Assume TWL VMMC2 (hsmmc[1]) is used only to power the card ... OMAP 276 * Assume Vcc regulator is used only to power the card ... OMAP
340 * VDDS is used to power the pins, optionally with a transceiver to 277 * VDDS is used to power the pins, optionally with a transceiver to
341 * support cards using voltages other than VDDS (1.8V nominal). When a 278 * support cards using voltages other than VDDS (1.8V nominal). When a
342 * transceiver is used, DAT3..7 are muxed as transceiver control pins. 279 * transceiver is used, DAT3..7 are muxed as transceiver control pins.
280 *
281 * In some cases this regulator won't support enable/disable;
282 * e.g. it's a fixed rail for a WLAN chip.
283 *
284 * In other cases vcc_aux switches interface power. Example, for
285 * eMMC cards it represents VccQ. Sometimes transceivers or SDIO
286 * chips/cards need an interface voltage rail too.
343 */ 287 */
344 if (power_on) { 288 if (power_on) {
289 /* only MMC2 supports a CLKIN */
345 if (mmc->slots[0].internal_clock) { 290 if (mmc->slots[0].internal_clock) {
346 u32 reg; 291 u32 reg;
347 292
@@ -349,24 +294,23 @@ static int twl_mmc2_set_power(struct device *dev, int slot, int power_on, int vd
349 reg |= OMAP2_MMCSDIO2ADPCLKISEL; 294 reg |= OMAP2_MMCSDIO2ADPCLKISEL;
350 omap_ctrl_writel(reg, control_devconf1_offset); 295 omap_ctrl_writel(reg, control_devconf1_offset);
351 } 296 }
352 ret = twl_mmc_set_voltage(c, vdd); 297 ret = mmc_regulator_set_ocr(c->vcc, vdd);
298 /* enable interface voltage rail, if needed */
299 if (ret == 0 && c->vcc_aux) {
300 ret = regulator_enable(c->vcc_aux);
301 if (ret < 0)
302 ret = mmc_regulator_set_ocr(c->vcc, 0);
303 }
353 } else { 304 } else {
354 ret = twl_mmc_set_voltage(c, 0); 305 if (c->vcc_aux && (ret = regulator_is_enabled(c->vcc_aux)) > 0)
306 ret = regulator_disable(c->vcc_aux);
307 if (ret == 0)
308 ret = mmc_regulator_set_ocr(c->vcc, 0);
355 } 309 }
356 310
357 return ret; 311 return ret;
358} 312}
359 313
360static int twl_mmc3_set_power(struct device *dev, int slot, int power_on,
361 int vdd)
362{
363 /*
364 * Assume MMC3 has self-powered device connected, for example on-board
365 * chip with external power source.
366 */
367 return 0;
368}
369
370static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata; 314static struct omap_mmc_platform_data *hsmmc_data[OMAP34XX_NR_MMC] __initdata;
371 315
372void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers) 316void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
@@ -412,10 +356,10 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
412 mmc->slots[0].wires = c->wires; 356 mmc->slots[0].wires = c->wires;
413 mmc->slots[0].internal_clock = !c->ext_clock; 357 mmc->slots[0].internal_clock = !c->ext_clock;
414 mmc->dma_mask = 0xffffffff; 358 mmc->dma_mask = 0xffffffff;
359 mmc->init = twl_mmc_late_init;
415 360
416 /* note: twl4030 card detect GPIOs normally switch VMMCx ... */ 361 /* note: twl4030 card detect GPIOs can disable VMMCx ... */
417 if (gpio_is_valid(c->gpio_cd)) { 362 if (gpio_is_valid(c->gpio_cd)) {
418 mmc->init = twl_mmc_late_init;
419 mmc->cleanup = twl_mmc_cleanup; 363 mmc->cleanup = twl_mmc_cleanup;
420 mmc->suspend = twl_mmc_suspend; 364 mmc->suspend = twl_mmc_suspend;
421 mmc->resume = twl_mmc_resume; 365 mmc->resume = twl_mmc_resume;
@@ -439,26 +383,28 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
439 } else 383 } else
440 mmc->slots[0].gpio_wp = -EINVAL; 384 mmc->slots[0].gpio_wp = -EINVAL;
441 385
442 /* NOTE: we assume OMAP's MMC1 and MMC2 use 386 /* NOTE: MMC slots should have a Vcc regulator set up.
443 * the TWL4030's VMMC1 and VMMC2, respectively; 387 * This may be from a TWL4030-family chip, another
444 * and that MMC3 device has it's own power source. 388 * controllable regulator, or a fixed supply.
389 *
390 * temporary HACK: ocr_mask instead of fixed supply
445 */ 391 */
392 mmc->slots[0].ocr_mask = c->ocr_mask;
446 393
447 switch (c->mmc) { 394 switch (c->mmc) {
448 case 1: 395 case 1:
396 /* on-chip level shifting via PBIAS0/PBIAS1 */
449 mmc->slots[0].set_power = twl_mmc1_set_power; 397 mmc->slots[0].set_power = twl_mmc1_set_power;
450 mmc->slots[0].ocr_mask = MMC1_OCR;
451 break; 398 break;
452 case 2: 399 case 2:
453 mmc->slots[0].set_power = twl_mmc2_set_power; 400 if (c->ext_clock)
454 if (c->transceiver) 401 c->transceiver = 1;
455 mmc->slots[0].ocr_mask = MMC2_OCR; 402 if (c->transceiver && c->wires > 4)
456 else 403 c->wires = 4;
457 mmc->slots[0].ocr_mask = MMC_VDD_165_195; 404 /* FALLTHROUGH */
458 break;
459 case 3: 405 case 3:
460 mmc->slots[0].set_power = twl_mmc3_set_power; 406 /* off-chip level shifting, or none */
461 mmc->slots[0].ocr_mask = MMC_VDD_165_195; 407 mmc->slots[0].set_power = twl_mmc23_set_power;
462 break; 408 break;
463 default: 409 default:
464 pr_err("MMC%d configuration not supported!\n", c->mmc); 410 pr_err("MMC%d configuration not supported!\n", c->mmc);