diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-28 17:03:14 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-03-28 17:03:14 -0400 |
commit | 0fe41b8982001cd14ee2c77cd776735a5024e98b (patch) | |
tree | 83e65d595c413d55259ea14fb97748ce5efe5707 /arch/arm/mach-omap2/mcbsp.c | |
parent | eedf2c5296a8dfaaf9aec1a938c1d3bd73159a30 (diff) | |
parent | 9759d22c8348343b0da4e25d6150c41712686c14 (diff) |
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (422 commits)
[ARM] 5435/1: fix compile warning in sanity_check_meminfo()
[ARM] 5434/1: ARM: OMAP: Fix mailbox compile for 24xx
[ARM] pxa: fix the bad assumption that PCMCIA sockets always start with 0
[ARM] pxa: fix Colibri PXA300 and PXA320 LCD backlight pins
imxfb: Fix TFT mode
i.MX21/27: remove ifdef CONFIG_FB_IMX
imxfb: add clock support
mxc: add arch_reset() function
clkdev: add possibility to get a clock based on the device name
i.MX1: remove fb support from mach-imx
[ARM] pxa: build arch/arm/plat-pxa/mfp.c only when PXA3xx or ARCH_MMP defined
Gemini: Add support for Teltonika RUT100
Gemini: gpiolib based GPIO support v2
MAINTAINERS: add myself as Gemini architecture maintainer
ARM: Add Gemini architecture v3
[ARM] OMAP: Fix compile for omap2_init_common_hw()
MAINTAINERS: Add myself as Faraday ARM core variant maintainer
ARM: Add support for FA526 v2
[ARM] acorn,ebsa110,footbridge,integrator,sa1100: Convert asm/io.h to linux/io.h
[ARM] collie: fix two minor formatting nits
...
Diffstat (limited to 'arch/arm/mach-omap2/mcbsp.c')
-rw-r--r-- | arch/arm/mach-omap2/mcbsp.c | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index a9e631fc1134..a5c0f0435cd6 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c | |||
@@ -24,8 +24,6 @@ | |||
24 | #include <mach/cpu.h> | 24 | #include <mach/cpu.h> |
25 | #include <mach/mcbsp.h> | 25 | #include <mach/mcbsp.h> |
26 | 26 | ||
27 | const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" }; | ||
28 | |||
29 | static void omap2_mcbsp2_mux_setup(void) | 27 | static void omap2_mcbsp2_mux_setup(void) |
30 | { | 28 | { |
31 | omap_cfg_reg(Y15_24XX_MCBSP2_CLKX); | 29 | omap_cfg_reg(Y15_24XX_MCBSP2_CLKX); |
@@ -57,8 +55,6 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { | |||
57 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, | 55 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, |
58 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, | 56 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, |
59 | .ops = &omap2_mcbsp_ops, | 57 | .ops = &omap2_mcbsp_ops, |
60 | .clk_names = clk_names, | ||
61 | .num_clks = 2, | ||
62 | }, | 58 | }, |
63 | { | 59 | { |
64 | .phys_base = OMAP24XX_MCBSP2_BASE, | 60 | .phys_base = OMAP24XX_MCBSP2_BASE, |
@@ -67,8 +63,6 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { | |||
67 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, | 63 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, |
68 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, | 64 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, |
69 | .ops = &omap2_mcbsp_ops, | 65 | .ops = &omap2_mcbsp_ops, |
70 | .clk_names = clk_names, | ||
71 | .num_clks = 2, | ||
72 | }, | 66 | }, |
73 | }; | 67 | }; |
74 | #define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) | 68 | #define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) |
@@ -86,8 +80,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
86 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, | 80 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, |
87 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, | 81 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, |
88 | .ops = &omap2_mcbsp_ops, | 82 | .ops = &omap2_mcbsp_ops, |
89 | .clk_names = clk_names, | ||
90 | .num_clks = 2, | ||
91 | }, | 83 | }, |
92 | { | 84 | { |
93 | .phys_base = OMAP24XX_MCBSP2_BASE, | 85 | .phys_base = OMAP24XX_MCBSP2_BASE, |
@@ -96,8 +88,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
96 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, | 88 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, |
97 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, | 89 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, |
98 | .ops = &omap2_mcbsp_ops, | 90 | .ops = &omap2_mcbsp_ops, |
99 | .clk_names = clk_names, | ||
100 | .num_clks = 2, | ||
101 | }, | 91 | }, |
102 | { | 92 | { |
103 | .phys_base = OMAP2430_MCBSP3_BASE, | 93 | .phys_base = OMAP2430_MCBSP3_BASE, |
@@ -106,8 +96,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
106 | .rx_irq = INT_24XX_MCBSP3_IRQ_RX, | 96 | .rx_irq = INT_24XX_MCBSP3_IRQ_RX, |
107 | .tx_irq = INT_24XX_MCBSP3_IRQ_TX, | 97 | .tx_irq = INT_24XX_MCBSP3_IRQ_TX, |
108 | .ops = &omap2_mcbsp_ops, | 98 | .ops = &omap2_mcbsp_ops, |
109 | .clk_names = clk_names, | ||
110 | .num_clks = 2, | ||
111 | }, | 99 | }, |
112 | { | 100 | { |
113 | .phys_base = OMAP2430_MCBSP4_BASE, | 101 | .phys_base = OMAP2430_MCBSP4_BASE, |
@@ -116,8 +104,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
116 | .rx_irq = INT_24XX_MCBSP4_IRQ_RX, | 104 | .rx_irq = INT_24XX_MCBSP4_IRQ_RX, |
117 | .tx_irq = INT_24XX_MCBSP4_IRQ_TX, | 105 | .tx_irq = INT_24XX_MCBSP4_IRQ_TX, |
118 | .ops = &omap2_mcbsp_ops, | 106 | .ops = &omap2_mcbsp_ops, |
119 | .clk_names = clk_names, | ||
120 | .num_clks = 2, | ||
121 | }, | 107 | }, |
122 | { | 108 | { |
123 | .phys_base = OMAP2430_MCBSP5_BASE, | 109 | .phys_base = OMAP2430_MCBSP5_BASE, |
@@ -126,8 +112,6 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { | |||
126 | .rx_irq = INT_24XX_MCBSP5_IRQ_RX, | 112 | .rx_irq = INT_24XX_MCBSP5_IRQ_RX, |
127 | .tx_irq = INT_24XX_MCBSP5_IRQ_TX, | 113 | .tx_irq = INT_24XX_MCBSP5_IRQ_TX, |
128 | .ops = &omap2_mcbsp_ops, | 114 | .ops = &omap2_mcbsp_ops, |
129 | .clk_names = clk_names, | ||
130 | .num_clks = 2, | ||
131 | }, | 115 | }, |
132 | }; | 116 | }; |
133 | #define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) | 117 | #define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) |
@@ -145,8 +129,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
145 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, | 129 | .rx_irq = INT_24XX_MCBSP1_IRQ_RX, |
146 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, | 130 | .tx_irq = INT_24XX_MCBSP1_IRQ_TX, |
147 | .ops = &omap2_mcbsp_ops, | 131 | .ops = &omap2_mcbsp_ops, |
148 | .clk_names = clk_names, | ||
149 | .num_clks = 2, | ||
150 | }, | 132 | }, |
151 | { | 133 | { |
152 | .phys_base = OMAP34XX_MCBSP2_BASE, | 134 | .phys_base = OMAP34XX_MCBSP2_BASE, |
@@ -155,8 +137,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
155 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, | 137 | .rx_irq = INT_24XX_MCBSP2_IRQ_RX, |
156 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, | 138 | .tx_irq = INT_24XX_MCBSP2_IRQ_TX, |
157 | .ops = &omap2_mcbsp_ops, | 139 | .ops = &omap2_mcbsp_ops, |
158 | .clk_names = clk_names, | ||
159 | .num_clks = 2, | ||
160 | }, | 140 | }, |
161 | { | 141 | { |
162 | .phys_base = OMAP34XX_MCBSP3_BASE, | 142 | .phys_base = OMAP34XX_MCBSP3_BASE, |
@@ -165,8 +145,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
165 | .rx_irq = INT_24XX_MCBSP3_IRQ_RX, | 145 | .rx_irq = INT_24XX_MCBSP3_IRQ_RX, |
166 | .tx_irq = INT_24XX_MCBSP3_IRQ_TX, | 146 | .tx_irq = INT_24XX_MCBSP3_IRQ_TX, |
167 | .ops = &omap2_mcbsp_ops, | 147 | .ops = &omap2_mcbsp_ops, |
168 | .clk_names = clk_names, | ||
169 | .num_clks = 2, | ||
170 | }, | 148 | }, |
171 | { | 149 | { |
172 | .phys_base = OMAP34XX_MCBSP4_BASE, | 150 | .phys_base = OMAP34XX_MCBSP4_BASE, |
@@ -175,8 +153,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
175 | .rx_irq = INT_24XX_MCBSP4_IRQ_RX, | 153 | .rx_irq = INT_24XX_MCBSP4_IRQ_RX, |
176 | .tx_irq = INT_24XX_MCBSP4_IRQ_TX, | 154 | .tx_irq = INT_24XX_MCBSP4_IRQ_TX, |
177 | .ops = &omap2_mcbsp_ops, | 155 | .ops = &omap2_mcbsp_ops, |
178 | .clk_names = clk_names, | ||
179 | .num_clks = 2, | ||
180 | }, | 156 | }, |
181 | { | 157 | { |
182 | .phys_base = OMAP34XX_MCBSP5_BASE, | 158 | .phys_base = OMAP34XX_MCBSP5_BASE, |
@@ -185,8 +161,6 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { | |||
185 | .rx_irq = INT_24XX_MCBSP5_IRQ_RX, | 161 | .rx_irq = INT_24XX_MCBSP5_IRQ_RX, |
186 | .tx_irq = INT_24XX_MCBSP5_IRQ_TX, | 162 | .tx_irq = INT_24XX_MCBSP5_IRQ_TX, |
187 | .ops = &omap2_mcbsp_ops, | 163 | .ops = &omap2_mcbsp_ops, |
188 | .clk_names = clk_names, | ||
189 | .num_clks = 2, | ||
190 | }, | 164 | }, |
191 | }; | 165 | }; |
192 | #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) | 166 | #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) |