diff options
| author | Tony Lindgren <tony@atomide.com> | 2010-08-04 09:10:38 -0400 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2010-08-04 09:10:38 -0400 |
| commit | d21872b3683ff37f73c68993749a6e6aeeaed265 (patch) | |
| tree | 0a84ae436325d6e646fe987516fb6bfccfff8a1c /arch/arm/mach-omap2/mailbox.c | |
| parent | 80690ccc41f01df6edfb6684006824d8edff189e (diff) | |
| parent | b3e69146f43fa351aa3cdffe2e76ec42174da612 (diff) | |
Merge branch 'v2.6.35-omap-mailbox-for-next' of git://gitorious.org/~doyu/lk/mainline into omap-for-linus
Conflicts:
arch/arm/mach-omap1/devices.c
Diffstat (limited to 'arch/arm/mach-omap2/mailbox.c')
| -rw-r--r-- | arch/arm/mach-omap2/mailbox.c | 182 |
1 files changed, 82 insertions, 100 deletions
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 318f3638653c..42dbfa46e656 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c | |||
| @@ -10,7 +10,6 @@ | |||
| 10 | * for more details. | 10 | * for more details. |
| 11 | */ | 11 | */ |
| 12 | 12 | ||
| 13 | #include <linux/kernel.h> | ||
| 14 | #include <linux/clk.h> | 13 | #include <linux/clk.h> |
| 15 | #include <linux/err.h> | 14 | #include <linux/err.h> |
| 16 | #include <linux/platform_device.h> | 15 | #include <linux/platform_device.h> |
| @@ -18,8 +17,6 @@ | |||
| 18 | #include <plat/mailbox.h> | 17 | #include <plat/mailbox.h> |
| 19 | #include <mach/irqs.h> | 18 | #include <mach/irqs.h> |
| 20 | 19 | ||
| 21 | #define DRV_NAME "omap2-mailbox" | ||
| 22 | |||
| 23 | #define MAILBOX_REVISION 0x000 | 20 | #define MAILBOX_REVISION 0x000 |
| 24 | #define MAILBOX_SYSCONFIG 0x010 | 21 | #define MAILBOX_SYSCONFIG 0x010 |
| 25 | #define MAILBOX_SYSSTATUS 0x014 | 22 | #define MAILBOX_SYSSTATUS 0x014 |
| @@ -131,7 +128,7 @@ static int omap2_mbox_startup(struct omap_mbox *mbox) | |||
| 131 | } | 128 | } |
| 132 | 129 | ||
| 133 | l = mbox_read_reg(MAILBOX_REVISION); | 130 | l = mbox_read_reg(MAILBOX_REVISION); |
| 134 | pr_info("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f)); | 131 | pr_debug("omap mailbox rev %d.%d\n", (l & 0xf0) >> 4, (l & 0x0f)); |
| 135 | 132 | ||
| 136 | if (cpu_is_omap44xx()) | 133 | if (cpu_is_omap44xx()) |
| 137 | l = OMAP4_SMARTIDLE; | 134 | l = OMAP4_SMARTIDLE; |
| @@ -283,6 +280,8 @@ static struct omap_mbox_ops omap2_mbox_ops = { | |||
| 283 | */ | 280 | */ |
| 284 | 281 | ||
| 285 | /* FIXME: the following structs should be filled automatically by the user id */ | 282 | /* FIXME: the following structs should be filled automatically by the user id */ |
| 283 | |||
| 284 | #if defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_ARCH_OMAP2420) | ||
| 286 | /* DSP */ | 285 | /* DSP */ |
| 287 | static struct omap_mbox2_priv omap2_mbox_dsp_priv = { | 286 | static struct omap_mbox2_priv omap2_mbox_dsp_priv = { |
| 288 | .tx_fifo = { | 287 | .tx_fifo = { |
| @@ -300,10 +299,46 @@ static struct omap_mbox2_priv omap2_mbox_dsp_priv = { | |||
| 300 | .irqdisable = MAILBOX_IRQENABLE(0), | 299 | .irqdisable = MAILBOX_IRQENABLE(0), |
| 301 | }; | 300 | }; |
| 302 | 301 | ||
| 302 | struct omap_mbox mbox_dsp_info = { | ||
| 303 | .name = "dsp", | ||
| 304 | .ops = &omap2_mbox_ops, | ||
| 305 | .priv = &omap2_mbox_dsp_priv, | ||
| 306 | }; | ||
| 307 | #endif | ||
| 308 | |||
| 309 | #if defined(CONFIG_ARCH_OMAP3430) | ||
| 310 | struct omap_mbox *omap3_mboxes[] = { &mbox_dsp_info, NULL }; | ||
| 311 | #endif | ||
| 312 | |||
| 313 | #if defined(CONFIG_ARCH_OMAP2420) | ||
| 314 | /* IVA */ | ||
| 315 | static struct omap_mbox2_priv omap2_mbox_iva_priv = { | ||
| 316 | .tx_fifo = { | ||
| 317 | .msg = MAILBOX_MESSAGE(2), | ||
| 318 | .fifo_stat = MAILBOX_FIFOSTATUS(2), | ||
| 319 | }, | ||
| 320 | .rx_fifo = { | ||
| 321 | .msg = MAILBOX_MESSAGE(3), | ||
| 322 | .msg_stat = MAILBOX_MSGSTATUS(3), | ||
| 323 | }, | ||
| 324 | .irqenable = MAILBOX_IRQENABLE(3), | ||
| 325 | .irqstatus = MAILBOX_IRQSTATUS(3), | ||
| 326 | .notfull_bit = MAILBOX_IRQ_NOTFULL(2), | ||
| 327 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(3), | ||
| 328 | .irqdisable = MAILBOX_IRQENABLE(3), | ||
| 329 | }; | ||
| 330 | |||
| 331 | static struct omap_mbox mbox_iva_info = { | ||
| 332 | .name = "iva", | ||
| 333 | .ops = &omap2_mbox_ops, | ||
| 334 | .priv = &omap2_mbox_iva_priv, | ||
| 335 | }; | ||
| 303 | 336 | ||
| 337 | struct omap_mbox *omap2_mboxes[] = { &mbox_iva_info, &mbox_dsp_info, NULL }; | ||
| 338 | #endif | ||
| 304 | 339 | ||
| 305 | /* OMAP4 specific data structure. Use the cpu_is_omap4xxx() | 340 | #if defined(CONFIG_ARCH_OMAP4) |
| 306 | to use this*/ | 341 | /* OMAP4 */ |
| 307 | static struct omap_mbox2_priv omap2_mbox_1_priv = { | 342 | static struct omap_mbox2_priv omap2_mbox_1_priv = { |
| 308 | .tx_fifo = { | 343 | .tx_fifo = { |
| 309 | .msg = MAILBOX_MESSAGE(0), | 344 | .msg = MAILBOX_MESSAGE(0), |
| @@ -325,14 +360,6 @@ struct omap_mbox mbox_1_info = { | |||
| 325 | .ops = &omap2_mbox_ops, | 360 | .ops = &omap2_mbox_ops, |
| 326 | .priv = &omap2_mbox_1_priv, | 361 | .priv = &omap2_mbox_1_priv, |
| 327 | }; | 362 | }; |
| 328 | EXPORT_SYMBOL(mbox_1_info); | ||
| 329 | |||
| 330 | struct omap_mbox mbox_dsp_info = { | ||
| 331 | .name = "dsp", | ||
| 332 | .ops = &omap2_mbox_ops, | ||
| 333 | .priv = &omap2_mbox_dsp_priv, | ||
| 334 | }; | ||
| 335 | EXPORT_SYMBOL(mbox_dsp_info); | ||
| 336 | 363 | ||
| 337 | static struct omap_mbox2_priv omap2_mbox_2_priv = { | 364 | static struct omap_mbox2_priv omap2_mbox_2_priv = { |
| 338 | .tx_fifo = { | 365 | .tx_fifo = { |
| @@ -355,110 +382,64 @@ struct omap_mbox mbox_2_info = { | |||
| 355 | .ops = &omap2_mbox_ops, | 382 | .ops = &omap2_mbox_ops, |
| 356 | .priv = &omap2_mbox_2_priv, | 383 | .priv = &omap2_mbox_2_priv, |
| 357 | }; | 384 | }; |
| 358 | EXPORT_SYMBOL(mbox_2_info); | ||
| 359 | |||
| 360 | |||
| 361 | #if defined(CONFIG_ARCH_OMAP2420) /* IVA */ | ||
| 362 | static struct omap_mbox2_priv omap2_mbox_iva_priv = { | ||
| 363 | .tx_fifo = { | ||
| 364 | .msg = MAILBOX_MESSAGE(2), | ||
| 365 | .fifo_stat = MAILBOX_FIFOSTATUS(2), | ||
| 366 | }, | ||
| 367 | .rx_fifo = { | ||
| 368 | .msg = MAILBOX_MESSAGE(3), | ||
| 369 | .msg_stat = MAILBOX_MSGSTATUS(3), | ||
| 370 | }, | ||
| 371 | .irqenable = MAILBOX_IRQENABLE(3), | ||
| 372 | .irqstatus = MAILBOX_IRQSTATUS(3), | ||
| 373 | .notfull_bit = MAILBOX_IRQ_NOTFULL(2), | ||
| 374 | .newmsg_bit = MAILBOX_IRQ_NEWMSG(3), | ||
| 375 | .irqdisable = MAILBOX_IRQENABLE(3), | ||
| 376 | }; | ||
| 377 | 385 | ||
| 378 | static struct omap_mbox mbox_iva_info = { | 386 | struct omap_mbox *omap4_mboxes[] = { &mbox_1_info, &mbox_2_info, NULL }; |
| 379 | .name = "iva", | ||
| 380 | .ops = &omap2_mbox_ops, | ||
| 381 | .priv = &omap2_mbox_iva_priv, | ||
| 382 | }; | ||
| 383 | #endif | 387 | #endif |
| 384 | 388 | ||
| 385 | static int __devinit omap2_mbox_probe(struct platform_device *pdev) | 389 | static int __devinit omap2_mbox_probe(struct platform_device *pdev) |
| 386 | { | 390 | { |
| 387 | struct resource *res; | 391 | struct resource *mem; |
| 388 | int ret; | 392 | int ret; |
| 393 | struct omap_mbox **list; | ||
| 389 | 394 | ||
| 390 | /* MBOX base */ | 395 | if (false) |
| 391 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 396 | ; |
| 392 | if (unlikely(!res)) { | 397 | #if defined(CONFIG_ARCH_OMAP3430) |
| 393 | dev_err(&pdev->dev, "invalid mem resource\n"); | 398 | else if (cpu_is_omap3430()) { |
| 394 | return -ENODEV; | 399 | list = omap3_mboxes; |
| 400 | |||
| 401 | list[0]->irq = platform_get_irq_byname(pdev, "dsp"); | ||
| 395 | } | 402 | } |
| 396 | mbox_base = ioremap(res->start, resource_size(res)); | 403 | #endif |
| 397 | if (!mbox_base) | 404 | #if defined(CONFIG_ARCH_OMAP2420) |
| 398 | return -ENOMEM; | 405 | else if (cpu_is_omap2420()) { |
| 406 | list = omap2_mboxes; | ||
| 399 | 407 | ||
| 400 | /* DSP or IVA2 IRQ */ | 408 | list[0]->irq = platform_get_irq_byname(pdev, "dsp"); |
| 401 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | 409 | list[1]->irq = platform_get_irq_byname(pdev, "iva"); |
| 410 | } | ||
| 411 | #endif | ||
| 412 | #if defined(CONFIG_ARCH_OMAP4) | ||
| 413 | else if (cpu_is_omap44xx()) { | ||
| 414 | list = omap4_mboxes; | ||
| 402 | 415 | ||
| 403 | if (unlikely(!res)) { | 416 | list[0]->irq = list[1]->irq = |
| 404 | dev_err(&pdev->dev, "invalid irq resource\n"); | 417 | platform_get_irq_byname(pdev, "mbox"); |
| 405 | ret = -ENODEV; | ||
| 406 | goto err_dsp; | ||
| 407 | } | 418 | } |
| 408 | if (cpu_is_omap44xx()) { | 419 | #endif |
| 409 | mbox_1_info.irq = res->start; | 420 | else { |
| 410 | ret = omap_mbox_register(&pdev->dev, &mbox_1_info); | 421 | pr_err("%s: platform not supported\n", __func__); |
| 411 | } else { | 422 | return -ENODEV; |
| 412 | mbox_dsp_info.irq = res->start; | ||
| 413 | ret = omap_mbox_register(&pdev->dev, &mbox_dsp_info); | ||
| 414 | } | 423 | } |
| 415 | if (ret) | ||
| 416 | goto err_dsp; | ||
| 417 | 424 | ||
| 418 | if (cpu_is_omap44xx()) { | 425 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 419 | mbox_2_info.irq = res->start; | 426 | mbox_base = ioremap(mem->start, resource_size(mem)); |
| 420 | ret = omap_mbox_register(&pdev->dev, &mbox_2_info); | 427 | if (!mbox_base) |
| 421 | if (ret) { | 428 | return -ENOMEM; |
| 422 | omap_mbox_unregister(&mbox_1_info); | 429 | |
| 423 | goto err_dsp; | 430 | ret = omap_mbox_register(&pdev->dev, list); |
| 424 | } | 431 | if (ret) { |
| 425 | } | 432 | iounmap(mbox_base); |
| 426 | #if defined(CONFIG_ARCH_OMAP2420) /* IVA */ | 433 | return ret; |
| 427 | if (cpu_is_omap2420()) { | ||
| 428 | /* IVA IRQ */ | ||
| 429 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 1); | ||
| 430 | if (unlikely(!res)) { | ||
| 431 | dev_err(&pdev->dev, "invalid irq resource\n"); | ||
| 432 | ret = -ENODEV; | ||
| 433 | omap_mbox_unregister(&mbox_dsp_info); | ||
| 434 | goto err_dsp; | ||
| 435 | } | ||
| 436 | mbox_iva_info.irq = res->start; | ||
| 437 | ret = omap_mbox_register(&pdev->dev, &mbox_iva_info); | ||
| 438 | if (ret) { | ||
| 439 | omap_mbox_unregister(&mbox_dsp_info); | ||
| 440 | goto err_dsp; | ||
| 441 | } | ||
| 442 | } | 434 | } |
| 443 | #endif | ||
| 444 | return 0; | 435 | return 0; |
| 445 | 436 | ||
| 446 | err_dsp: | ||
| 447 | iounmap(mbox_base); | ||
| 448 | return ret; | 437 | return ret; |
| 449 | } | 438 | } |
| 450 | 439 | ||
| 451 | static int __devexit omap2_mbox_remove(struct platform_device *pdev) | 440 | static int __devexit omap2_mbox_remove(struct platform_device *pdev) |
| 452 | { | 441 | { |
| 453 | #if defined(CONFIG_ARCH_OMAP2420) | 442 | omap_mbox_unregister(); |
| 454 | omap_mbox_unregister(&mbox_iva_info); | ||
| 455 | #endif | ||
| 456 | |||
| 457 | if (cpu_is_omap44xx()) { | ||
| 458 | omap_mbox_unregister(&mbox_2_info); | ||
| 459 | omap_mbox_unregister(&mbox_1_info); | ||
| 460 | } else | ||
| 461 | omap_mbox_unregister(&mbox_dsp_info); | ||
| 462 | iounmap(mbox_base); | 443 | iounmap(mbox_base); |
| 463 | return 0; | 444 | return 0; |
| 464 | } | 445 | } |
| @@ -467,7 +448,7 @@ static struct platform_driver omap2_mbox_driver = { | |||
| 467 | .probe = omap2_mbox_probe, | 448 | .probe = omap2_mbox_probe, |
| 468 | .remove = __devexit_p(omap2_mbox_remove), | 449 | .remove = __devexit_p(omap2_mbox_remove), |
| 469 | .driver = { | 450 | .driver = { |
| 470 | .name = DRV_NAME, | 451 | .name = "omap-mailbox", |
| 471 | }, | 452 | }, |
| 472 | }; | 453 | }; |
| 473 | 454 | ||
| @@ -486,5 +467,6 @@ module_exit(omap2_mbox_exit); | |||
| 486 | 467 | ||
| 487 | MODULE_LICENSE("GPL v2"); | 468 | MODULE_LICENSE("GPL v2"); |
| 488 | MODULE_DESCRIPTION("omap mailbox: omap2/3/4 architecture specific functions"); | 469 | MODULE_DESCRIPTION("omap mailbox: omap2/3/4 architecture specific functions"); |
| 489 | MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>, Paul Mundt"); | 470 | MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>"); |
| 490 | MODULE_ALIAS("platform:"DRV_NAME); | 471 | MODULE_AUTHOR("Paul Mundt"); |
| 472 | MODULE_ALIAS("platform:omap2-mailbox"); | ||
