diff options
author | Suman Anna <s-anna@ti.com> | 2010-01-26 17:55:29 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2010-02-23 18:29:21 -0500 |
commit | a6a6022871b83ff31c34495709f53e3faef80976 (patch) | |
tree | 415bd61021c60b70f9b7605d403db51823b159ee /arch/arm/mach-omap2/mailbox.c | |
parent | 5772ca7d7897722e7ed4c476bafee0b07bd9193e (diff) |
omap: mailbox: correct OMAP4 reset logic
OMAP4 mailbox has a different register set. There is
no MAILBOX_SYSSTATUS register. The reset is indicated
with the SOFTRESET bit of the MAILBOX_SYSCONFIG register
itself. This bit should read 0 for a successful Reset.
Also, the SOFTRESET bit occupies bit0 and not bit1 as with
previous generations.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/mailbox.c')
-rw-r--r-- | arch/arm/mach-omap2/mailbox.c | 38 |
1 files changed, 27 insertions, 11 deletions
diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index 2c9fd1c2a7c7..6519716571cb 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c | |||
@@ -40,6 +40,7 @@ | |||
40 | #define AUTOIDLE (1 << 0) | 40 | #define AUTOIDLE (1 << 0) |
41 | #define SOFTRESET (1 << 1) | 41 | #define SOFTRESET (1 << 1) |
42 | #define SMARTIDLE (2 << 3) | 42 | #define SMARTIDLE (2 << 3) |
43 | #define OMAP4_SOFTRESET (1 << 0) | ||
43 | 44 | ||
44 | /* SYSSTATUS: register bit definition */ | 45 | /* SYSSTATUS: register bit definition */ |
45 | #define RESETDONE (1 << 0) | 46 | #define RESETDONE (1 << 0) |
@@ -99,17 +100,32 @@ static int omap2_mbox_startup(struct omap_mbox *mbox) | |||
99 | } | 100 | } |
100 | clk_enable(mbox_ick_handle); | 101 | clk_enable(mbox_ick_handle); |
101 | 102 | ||
102 | mbox_write_reg(SOFTRESET, MAILBOX_SYSCONFIG); | 103 | if (cpu_is_omap44xx()) { |
103 | timeout = jiffies + msecs_to_jiffies(20); | 104 | mbox_write_reg(OMAP4_SOFTRESET, MAILBOX_SYSCONFIG); |
104 | do { | 105 | timeout = jiffies + msecs_to_jiffies(20); |
105 | l = mbox_read_reg(MAILBOX_SYSSTATUS); | 106 | do { |
106 | if (l & RESETDONE) | 107 | l = mbox_read_reg(MAILBOX_SYSCONFIG); |
107 | break; | 108 | if (!(l & OMAP4_SOFTRESET)) |
108 | } while (!time_after(jiffies, timeout)); | 109 | break; |
109 | 110 | } while (!time_after(jiffies, timeout)); | |
110 | if (!(l & RESETDONE)) { | 111 | |
111 | pr_err("Can't take mmu out of reset\n"); | 112 | if (l & OMAP4_SOFTRESET) { |
112 | return -ENODEV; | 113 | pr_err("Can't take mailbox out of reset\n"); |
114 | return -ENODEV; | ||
115 | } | ||
116 | } else { | ||
117 | mbox_write_reg(SOFTRESET, MAILBOX_SYSCONFIG); | ||
118 | timeout = jiffies + msecs_to_jiffies(20); | ||
119 | do { | ||
120 | l = mbox_read_reg(MAILBOX_SYSSTATUS); | ||
121 | if (l & RESETDONE) | ||
122 | break; | ||
123 | } while (!time_after(jiffies, timeout)); | ||
124 | |||
125 | if (!(l & RESETDONE)) { | ||
126 | pr_err("Can't take mailbox out of reset\n"); | ||
127 | return -ENODEV; | ||
128 | } | ||
113 | } | 129 | } |
114 | 130 | ||
115 | l = mbox_read_reg(MAILBOX_REVISION); | 131 | l = mbox_read_reg(MAILBOX_REVISION); |