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authorTony Lindgren <tony@atomide.com>2010-02-12 15:26:47 -0500
committerTony Lindgren <tony@atomide.com>2010-02-15 12:26:58 -0500
commit6fbd55d077cdf2aeb7a170ff9f5779d19506bf9e (patch)
treece9f17ce3460e69841b48e1e0dbce591f48090d5 /arch/arm/mach-omap2/io.c
parent882c0518e5317a41834d0fceee07ae6ada2d7429 (diff)
omap2/3/4: Fix omap2_map_common_io for multi-omap
Fix omap2_map_common_io for multi-omap Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/io.c')
-rw-r--r--arch/arm/mach-omap2/io.c51
1 files changed, 34 insertions, 17 deletions
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 01ef2ae93593..31296cbecb0b 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -236,37 +236,54 @@ static struct map_desc omap44xx_io_desc[] __initdata = {
236}; 236};
237#endif 237#endif
238 238
239void __init omap2_map_common_io(void) 239static void __init _omap2_map_common_io(void)
240{
241 /* Normally devicemaps_init() would flush caches and tlb after
242 * mdesc->map_io(), but we must also do it here because of the CPU
243 * revision check below.
244 */
245 local_flush_tlb_all();
246 flush_cache_all();
247
248 omap2_check_revision();
249 omap_sram_init();
250 omapfb_reserve_sdram();
251 omap_vram_reserve_sdram();
252}
253
254#ifdef CONFIG_ARCH_OMAP2420
255void __init omap242x_map_common_io()
240{ 256{
241#if defined(CONFIG_ARCH_OMAP2420)
242 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); 257 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
243 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc)); 258 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
259 _omap2_map_common_io();
260}
244#endif 261#endif
245 262
246#if defined(CONFIG_ARCH_OMAP2430) 263#ifdef CONFIG_ARCH_OMAP2430
264void __init omap243x_map_common_io()
265{
247 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc)); 266 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
248 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc)); 267 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
268 _omap2_map_common_io();
269}
249#endif 270#endif
250 271
251#if defined(CONFIG_ARCH_OMAP34XX) 272#ifdef CONFIG_ARCH_OMAP34XX
273void __init omap34xx_map_common_io()
274{
252 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc)); 275 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
276 _omap2_map_common_io();
277}
253#endif 278#endif
254 279
255#if defined(CONFIG_ARCH_OMAP4) 280#ifdef CONFIG_ARCH_OMAP4
281void __init omap44xx_map_common_io()
282{
256 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc)); 283 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
257#endif 284 _omap2_map_common_io();
258 /* Normally devicemaps_init() would flush caches and tlb after
259 * mdesc->map_io(), but we must also do it here because of the CPU
260 * revision check below.
261 */
262 local_flush_tlb_all();
263 flush_cache_all();
264
265 omap2_check_revision();
266 omap_sram_init();
267 omapfb_reserve_sdram();
268 omap_vram_reserve_sdram();
269} 285}
286#endif
270 287
271/* 288/*
272 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters 289 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters