diff options
author | Hemant Pedanekar <hemantp@ti.com> | 2011-02-16 11:31:39 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2011-02-16 11:31:39 -0500 |
commit | 01001712c96f82e6317b1e09729d8fc4bcc66957 (patch) | |
tree | b75376536771c5dd5398733b82a509bcacba8bc8 /arch/arm/mach-omap2/include | |
parent | 4bd7be22f4b25fc87e236a29da3a625621699074 (diff) |
TI816X: Update common OMAP machine specific sources
This patch updates the common machine specific source files with support for
TI816X.
Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/include')
-rw-r--r-- | arch/arm/mach-omap2/include/mach/entry-macro.S | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index 81985a665cb3..a48690b90990 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S | |||
@@ -61,6 +61,14 @@ | |||
61 | bne 9998f | 61 | bne 9998f |
62 | ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ | 62 | ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ |
63 | cmp \irqnr, #0x0 | 63 | cmp \irqnr, #0x0 |
64 | bne 9998f | ||
65 | |||
66 | /* | ||
67 | * ti816x has additional IRQ pending register. Checking this | ||
68 | * register on omap2 & omap3 has no effect (read as 0). | ||
69 | */ | ||
70 | ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */ | ||
71 | cmp \irqnr, #0x0 | ||
64 | 9998: | 72 | 9998: |
65 | ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] | 73 | ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] |
66 | and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ | 74 | and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ |
@@ -133,6 +141,11 @@ | |||
133 | bne 9999f | 141 | bne 9999f |
134 | ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ | 142 | ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */ |
135 | cmp \irqnr, #0x0 | 143 | cmp \irqnr, #0x0 |
144 | #ifdef CONFIG_SOC_OMAPTI816X | ||
145 | bne 9999f | ||
146 | ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */ | ||
147 | cmp \irqnr, #0x0 | ||
148 | #endif | ||
136 | 9999: | 149 | 9999: |
137 | ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] | 150 | ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET] |
138 | and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ | 151 | and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */ |