diff options
author | Nicolas Pitre <nicolas.pitre@linaro.org> | 2011-09-01 00:48:04 -0400 |
---|---|---|
committer | Nicolas Pitre <nico@fluxnic.net> | 2011-09-26 10:11:27 -0400 |
commit | fa808a1ba5f9d40ad47c31f63691b1ded03a46f8 (patch) | |
tree | 1ccd2315bba082cf4fa9a831bcad683b197cc01c /arch/arm/mach-omap2/include/mach | |
parent | 28362d5153757dcb7af9a63978202c1ed1e3cf39 (diff) |
ARM: mach-omap2: clean up debug-macro.S
This achieves two goals:
1) Get rid of omap_uart_v2p() and omap_uart_p2v() which were the last users
of PLAT_PHYS_OFFSET.
2) Remove the probing of the M bit in the CP15 control reg and make
the access to the .data variables completely position independent.
There is a catch though: the busyuart macro needs to know where the LSR
register is which might be at a different offset depending on the hardware.
Given that this macro is given only two registers and that one of them
must be preserved, the trick is to always pass the LSR register address
around, and deduce the base address for the THR register by masking out
the LSR offset in senduart instead.
Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/include/mach')
-rw-r--r-- | arch/arm/mach-omap2/include/mach/debug-macro.S | 70 |
1 files changed, 31 insertions, 39 deletions
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S index 745e2ff3e906..13f98e59cfef 100644 --- a/arch/arm/mach-omap2/include/mach/debug-macro.S +++ b/arch/arm/mach-omap2/include/mach/debug-macro.S | |||
@@ -13,15 +13,10 @@ | |||
13 | 13 | ||
14 | #include <linux/serial_reg.h> | 14 | #include <linux/serial_reg.h> |
15 | 15 | ||
16 | #include <asm/memory.h> | ||
17 | |||
18 | #include <plat/serial.h> | 16 | #include <plat/serial.h> |
19 | 17 | ||
20 | #define UART_OFFSET(addr) ((addr) & 0x00ffffff) | 18 | #define UART_OFFSET(addr) ((addr) & 0x00ffffff) |
21 | 19 | ||
22 | #define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET) | ||
23 | #define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET) | ||
24 | |||
25 | .pushsection .data | 20 | .pushsection .data |
26 | omap_uart_phys: .word 0 | 21 | omap_uart_phys: .word 0 |
27 | omap_uart_virt: .word 0 | 22 | omap_uart_virt: .word 0 |
@@ -37,16 +32,16 @@ omap_uart_lsr: .word 0 | |||
37 | .macro addruart, rp, rv, tmp | 32 | .macro addruart, rp, rv, tmp |
38 | 33 | ||
39 | /* Use omap_uart_phys/virt if already configured */ | 34 | /* Use omap_uart_phys/virt if already configured */ |
40 | 10: mrc p15, 0, \rp, c1, c0 | 35 | 10: adr \rp, 99f @ get effective addr of 99f |
41 | tst \rp, #1 @ MMU enabled? | 36 | ldr \rv, [\rp] @ get absolute addr of 99f |
42 | ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled | 37 | sub \rv, \rv, \rp @ offset between the two |
43 | ldrne \rp, =omap_uart_phys @ MMU enabled | 38 | ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys |
44 | add \rv, \rp, #4 @ omap_uart_virt | 39 | sub \tmp, \rp, \rv @ make it effective |
45 | ldr \rp, [\rp, #0] | 40 | ldr \rp, [\tmp, #0] @ omap_uart_phys |
46 | ldr \rv, [\rv, #0] | 41 | ldr \rv, [\tmp, #4] @ omap_uart_virt |
47 | cmp \rp, #0 @ is port configured? | 42 | cmp \rp, #0 @ is port configured? |
48 | cmpne \rv, #0 | 43 | cmpne \rv, #0 |
49 | bne 99f @ already configured | 44 | bne 100f @ already configured |
50 | 45 | ||
51 | /* Check the debug UART configuration set in uncompress.h */ | 46 | /* Check the debug UART configuration set in uncompress.h */ |
52 | mov \rp, pc | 47 | mov \rp, pc |
@@ -105,50 +100,47 @@ omap_uart_lsr: .word 0 | |||
105 | b 98f | 100 | b 98f |
106 | 83: mov \rp, #UART_OFFSET(TI816X_UART3_BASE) | 101 | 83: mov \rp, #UART_OFFSET(TI816X_UART3_BASE) |
107 | b 98f | 102 | b 98f |
103 | |||
108 | 95: ldr \rp, =ZOOM_UART_BASE | 104 | 95: ldr \rp, =ZOOM_UART_BASE |
109 | mrc p15, 0, \rv, c1, c0 | 105 | str \rp, [\tmp, #0] @ omap_uart_phys |
110 | tst \rv, #1 @ MMU enabled? | ||
111 | ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled | ||
112 | ldrne \rv, =omap_uart_phys @ MMU enabled | ||
113 | str \rp, [\rv, #0] | ||
114 | ldr \rp, =ZOOM_UART_VIRT | 106 | ldr \rp, =ZOOM_UART_VIRT |
115 | add \rv, \rv, #4 @ omap_uart_virt | 107 | str \rp, [\tmp, #4] @ omap_uart_virt |
116 | str \rp, [\rv, #0] | ||
117 | mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT) | 108 | mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT) |
118 | add \rv, \rv, #4 @ omap_uart_lsr | 109 | str \rp, [\tmp, #8] @ omap_uart_lsr |
119 | str \rp, [\rv, #0] | ||
120 | b 10b | 110 | b 10b |
121 | 111 | ||
122 | /* Store both phys and virt address for the uart */ | 112 | /* Store both phys and virt address for the uart */ |
123 | 98: add \rp, \rp, #0x48000000 @ phys base | 113 | 98: add \rp, \rp, #0x48000000 @ phys base |
124 | mrc p15, 0, \rv, c1, c0 | 114 | str \rp, [\tmp, #0] @ omap_uart_phys |
125 | tst \rv, #1 @ MMU enabled? | ||
126 | ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled | ||
127 | ldrne \rv, =omap_uart_phys @ MMU enabled | ||
128 | str \rp, [\rv, #0] | ||
129 | sub \rp, \rp, #0x48000000 @ phys base | 115 | sub \rp, \rp, #0x48000000 @ phys base |
130 | add \rp, \rp, #0xfa000000 @ virt base | 116 | add \rp, \rp, #0xfa000000 @ virt base |
131 | add \rv, \rv, #4 @ omap_uart_virt | 117 | str \rp, [\tmp, #4] @ omap_uart_virt |
132 | str \rp, [\rv, #0] | ||
133 | mov \rp, #(UART_LSR << OMAP_PORT_SHIFT) | 118 | mov \rp, #(UART_LSR << OMAP_PORT_SHIFT) |
134 | add \rv, \rv, #4 @ omap_uart_lsr | 119 | str \rp, [\tmp, #8] @ omap_uart_lsr |
135 | str \rp, [\rv, #0] | ||
136 | 120 | ||
137 | b 10b | 121 | b 10b |
138 | 99: | 122 | |
123 | .align | ||
124 | 99: .word . | ||
125 | .word omap_uart_phys | ||
126 | .ltorg | ||
127 | |||
128 | 100: /* Pass the UART_LSR reg address */ | ||
129 | ldr \tmp, [\tmp, #8] @ omap_uart_lsr | ||
130 | add \rp, \rp, \tmp | ||
131 | add \rv, \rv, \tmp | ||
139 | .endm | 132 | .endm |
140 | 133 | ||
141 | .macro senduart,rd,rx | 134 | .macro senduart,rd,rx |
142 | strb \rd, [\rx] | 135 | orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset |
136 | bic \rx, \rx, #0xff @ get base (THR) reg address | ||
137 | strb \rd, [\rx] @ send lower byte of rd | ||
138 | orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR) | ||
139 | bic \rd, \rd, #(0xff << 24) @ restore original rd | ||
143 | .endm | 140 | .endm |
144 | 141 | ||
145 | .macro busyuart,rd,rx | 142 | .macro busyuart,rd,rx |
146 | 1001: mrc p15, 0, \rd, c1, c0 | 143 | 1001: ldrb \rd, [\rx] @ rx contains UART_LSR address |
147 | tst \rd, #1 @ MMU enabled? | ||
148 | ldreq \rd, =omap_uart_v2p(omap_uart_lsr) @ MMU disabled | ||
149 | ldrne \rd, =omap_uart_lsr @ MMU enabled | ||
150 | ldr \rd, [\rd, #0] | ||
151 | ldrb \rd, [\rx, \rd] | ||
152 | and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) | 144 | and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) |
153 | teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE) | 145 | teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE) |
154 | bne 1001b | 146 | bne 1001b |