diff options
author | Tony Lindgren <tony@atomide.com> | 2010-12-09 18:49:23 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2010-12-10 12:42:51 -0500 |
commit | 5d190c40100793a6dfc37bf325677c10f3c80edf (patch) | |
tree | deb1dd54ec3b056fb10ed2ae24729cba7505bb85 /arch/arm/mach-omap2/include/mach | |
parent | 03a9e5126147c9f92aeba4b34f62b15b625087fb (diff) |
omap2+: Initialize omap_irq_base for entry-macro.S from platform code
This way we can use the generic omap SoC detection code instead.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/include/mach')
-rw-r--r-- | arch/arm/mach-omap2/include/mach/entry-macro.S | 44 |
1 files changed, 15 insertions, 29 deletions
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index 06e64e1fc28a..60329411a636 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S | |||
@@ -38,41 +38,27 @@ | |||
38 | */ | 38 | */ |
39 | 39 | ||
40 | #ifdef MULTI_OMAP2 | 40 | #ifdef MULTI_OMAP2 |
41 | |||
42 | /* | ||
43 | * We use __glue to avoid errors with multiple definitions of | ||
44 | * .globl omap_irq_base as it's included from entry-armv.S but not | ||
45 | * from entry-common.S. | ||
46 | */ | ||
47 | #ifdef __glue | ||
41 | .pushsection .data | 48 | .pushsection .data |
42 | omap_irq_base: .word 0 | 49 | .globl omap_irq_base |
50 | omap_irq_base: | ||
51 | .word 0 | ||
43 | .popsection | 52 | .popsection |
53 | #endif | ||
44 | 54 | ||
45 | /* Configure the interrupt base on the first interrupt */ | 55 | /* |
56 | * Configure the interrupt base on the first interrupt. | ||
57 | * See also omap_irq_base_init for setting omap_irq_base. | ||
58 | */ | ||
46 | .macro get_irqnr_preamble, base, tmp | 59 | .macro get_irqnr_preamble, base, tmp |
47 | 9: | ||
48 | ldr \base, =omap_irq_base @ irq base address | 60 | ldr \base, =omap_irq_base @ irq base address |
49 | ldr \base, [\base, #0] @ irq base value | 61 | ldr \base, [\base, #0] @ irq base value |
50 | cmp \base, #0 @ already configured? | ||
51 | bne 9997f @ nothing to do | ||
52 | |||
53 | mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision | ||
54 | and \tmp, \tmp, #0x000f0000 @ only check architecture | ||
55 | cmp \tmp, #0x00070000 @ is v6? | ||
56 | beq 2400f @ found v6 so it's omap24xx | ||
57 | mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision | ||
58 | and \tmp, \tmp, #0x000000f0 @ check cortex 8 or 9 | ||
59 | cmp \tmp, #0x00000080 @ cortex A-8? | ||
60 | beq 3400f @ found A-8 so it's omap34xx | ||
61 | cmp \tmp, #0x00000090 @ cortex A-9? | ||
62 | beq 4400f @ found A-9 so it's omap44xx | ||
63 | 2400: ldr \base, =OMAP2_IRQ_BASE | ||
64 | ldr \tmp, =omap_irq_base | ||
65 | str \base, [\tmp, #0] | ||
66 | b 9b | ||
67 | 3400: ldr \base, =OMAP3_IRQ_BASE | ||
68 | ldr \tmp, =omap_irq_base | ||
69 | str \base, [\tmp, #0] | ||
70 | b 9b | ||
71 | 4400: ldr \base, =OMAP4_IRQ_BASE | ||
72 | ldr \tmp, =omap_irq_base | ||
73 | str \base, [\tmp, #0] | ||
74 | b 9b | ||
75 | 9997: | ||
76 | .endm | 62 | .endm |
77 | 63 | ||
78 | /* Check the pending interrupts. Note that base already set */ | 64 | /* Check the pending interrupts. Note that base already set */ |