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authorTony Lindgren <tony@atomide.com>2009-11-22 13:08:43 -0500
committerTony Lindgren <tony@atomide.com>2009-11-22 13:08:43 -0500
commita76df42a675c9936e8bf3607226e74c8a5e2d847 (patch)
tree96d93706d884dea956393653452fa4d78d8d7f76 /arch/arm/mach-omap2/gpmc.c
parent648f4e3e50c4793d9dbf9a09afa193631f76fa26 (diff)
parent8171d88089ad63fc442b2bf32af7c18653adc5cb (diff)
Merge 7xx-iosplit-plat-merge with omap-fixes
Merge branch '7xx-iosplit-plat-merge' into omap-for-linus
Diffstat (limited to 'arch/arm/mach-omap2/gpmc.c')
-rw-r--r--arch/arm/mach-omap2/gpmc.c102
1 files changed, 97 insertions, 5 deletions
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index f3c992e29651..e86f5ca180ea 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -24,9 +24,9 @@
24#include <linux/module.h> 24#include <linux/module.h>
25 25
26#include <asm/mach-types.h> 26#include <asm/mach-types.h>
27#include <mach/gpmc.h> 27#include <plat/gpmc.h>
28 28
29#include <mach/sdrc.h> 29#include <plat/sdrc.h>
30 30
31/* GPMC register offsets */ 31/* GPMC register offsets */
32#define GPMC_REVISION 0x00 32#define GPMC_REVISION 0x00
@@ -62,6 +62,33 @@
62#define ENABLE_PREFETCH (0x1 << 7) 62#define ENABLE_PREFETCH (0x1 << 7)
63#define DMA_MPU_MODE 2 63#define DMA_MPU_MODE 2
64 64
65/* Structure to save gpmc cs context */
66struct gpmc_cs_config {
67 u32 config1;
68 u32 config2;
69 u32 config3;
70 u32 config4;
71 u32 config5;
72 u32 config6;
73 u32 config7;
74 int is_valid;
75};
76
77/*
78 * Structure to save/restore gpmc context
79 * to support core off on OMAP3
80 */
81struct omap3_gpmc_regs {
82 u32 sysconfig;
83 u32 irqenable;
84 u32 timeout_ctrl;
85 u32 config;
86 u32 prefetch_config1;
87 u32 prefetch_config2;
88 u32 prefetch_control;
89 struct gpmc_cs_config cs_context[GPMC_CS_NUM];
90};
91
65static struct resource gpmc_mem_root; 92static struct resource gpmc_mem_root;
66static struct resource gpmc_cs_mem[GPMC_CS_NUM]; 93static struct resource gpmc_cs_mem[GPMC_CS_NUM];
67static DEFINE_SPINLOCK(gpmc_mem_lock); 94static DEFINE_SPINLOCK(gpmc_mem_lock);
@@ -261,7 +288,7 @@ static void gpmc_cs_enable_mem(int cs, u32 base, u32 size)
261 l = (base >> GPMC_CHUNK_SHIFT) & 0x3f; 288 l = (base >> GPMC_CHUNK_SHIFT) & 0x3f;
262 l &= ~(0x0f << 8); 289 l &= ~(0x0f << 8);
263 l |= ((mask >> GPMC_CHUNK_SHIFT) & 0x0f) << 8; 290 l |= ((mask >> GPMC_CHUNK_SHIFT) & 0x0f) << 8;
264 l |= 1 << 6; /* CSVALID */ 291 l |= GPMC_CONFIG7_CSVALID;
265 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); 292 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
266} 293}
267 294
@@ -270,7 +297,7 @@ static void gpmc_cs_disable_mem(int cs)
270 u32 l; 297 u32 l;
271 298
272 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); 299 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
273 l &= ~(1 << 6); /* CSVALID */ 300 l &= ~GPMC_CONFIG7_CSVALID;
274 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l); 301 gpmc_cs_write_reg(cs, GPMC_CS_CONFIG7, l);
275} 302}
276 303
@@ -290,7 +317,7 @@ static int gpmc_cs_mem_enabled(int cs)
290 u32 l; 317 u32 l;
291 318
292 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7); 319 l = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG7);
293 return l & (1 << 6); 320 return l & GPMC_CONFIG7_CSVALID;
294} 321}
295 322
296int gpmc_cs_set_reserved(int cs, int reserved) 323int gpmc_cs_set_reserved(int cs, int reserved)
@@ -516,3 +543,68 @@ void __init gpmc_init(void)
516 gpmc_write_reg(GPMC_SYSCONFIG, l); 543 gpmc_write_reg(GPMC_SYSCONFIG, l);
517 gpmc_mem_init(); 544 gpmc_mem_init();
518} 545}
546
547#ifdef CONFIG_ARCH_OMAP3
548static struct omap3_gpmc_regs gpmc_context;
549
550void omap3_gpmc_save_context()
551{
552 int i;
553 gpmc_context.sysconfig = gpmc_read_reg(GPMC_SYSCONFIG);
554 gpmc_context.irqenable = gpmc_read_reg(GPMC_IRQENABLE);
555 gpmc_context.timeout_ctrl = gpmc_read_reg(GPMC_TIMEOUT_CONTROL);
556 gpmc_context.config = gpmc_read_reg(GPMC_CONFIG);
557 gpmc_context.prefetch_config1 = gpmc_read_reg(GPMC_PREFETCH_CONFIG1);
558 gpmc_context.prefetch_config2 = gpmc_read_reg(GPMC_PREFETCH_CONFIG2);
559 gpmc_context.prefetch_control = gpmc_read_reg(GPMC_PREFETCH_CONTROL);
560 for (i = 0; i < GPMC_CS_NUM; i++) {
561 gpmc_context.cs_context[i].is_valid = gpmc_cs_mem_enabled(i);
562 if (gpmc_context.cs_context[i].is_valid) {
563 gpmc_context.cs_context[i].config1 =
564 gpmc_cs_read_reg(i, GPMC_CS_CONFIG1);
565 gpmc_context.cs_context[i].config2 =
566 gpmc_cs_read_reg(i, GPMC_CS_CONFIG2);
567 gpmc_context.cs_context[i].config3 =
568 gpmc_cs_read_reg(i, GPMC_CS_CONFIG3);
569 gpmc_context.cs_context[i].config4 =
570 gpmc_cs_read_reg(i, GPMC_CS_CONFIG4);
571 gpmc_context.cs_context[i].config5 =
572 gpmc_cs_read_reg(i, GPMC_CS_CONFIG5);
573 gpmc_context.cs_context[i].config6 =
574 gpmc_cs_read_reg(i, GPMC_CS_CONFIG6);
575 gpmc_context.cs_context[i].config7 =
576 gpmc_cs_read_reg(i, GPMC_CS_CONFIG7);
577 }
578 }
579}
580
581void omap3_gpmc_restore_context()
582{
583 int i;
584 gpmc_write_reg(GPMC_SYSCONFIG, gpmc_context.sysconfig);
585 gpmc_write_reg(GPMC_IRQENABLE, gpmc_context.irqenable);
586 gpmc_write_reg(GPMC_TIMEOUT_CONTROL, gpmc_context.timeout_ctrl);
587 gpmc_write_reg(GPMC_CONFIG, gpmc_context.config);
588 gpmc_write_reg(GPMC_PREFETCH_CONFIG1, gpmc_context.prefetch_config1);
589 gpmc_write_reg(GPMC_PREFETCH_CONFIG2, gpmc_context.prefetch_config2);
590 gpmc_write_reg(GPMC_PREFETCH_CONTROL, gpmc_context.prefetch_control);
591 for (i = 0; i < GPMC_CS_NUM; i++) {
592 if (gpmc_context.cs_context[i].is_valid) {
593 gpmc_cs_write_reg(i, GPMC_CS_CONFIG1,
594 gpmc_context.cs_context[i].config1);
595 gpmc_cs_write_reg(i, GPMC_CS_CONFIG2,
596 gpmc_context.cs_context[i].config2);
597 gpmc_cs_write_reg(i, GPMC_CS_CONFIG3,
598 gpmc_context.cs_context[i].config3);
599 gpmc_cs_write_reg(i, GPMC_CS_CONFIG4,
600 gpmc_context.cs_context[i].config4);
601 gpmc_cs_write_reg(i, GPMC_CS_CONFIG5,
602 gpmc_context.cs_context[i].config5);
603 gpmc_cs_write_reg(i, GPMC_CS_CONFIG6,
604 gpmc_context.cs_context[i].config6);
605 gpmc_cs_write_reg(i, GPMC_CS_CONFIG7,
606 gpmc_context.cs_context[i].config7);
607 }
608 }
609}
610#endif /* CONFIG_ARCH_OMAP3 */