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| author | Tony Lindgren <tony@atomide.com> | 2012-09-23 22:31:35 -0400 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2012-09-23 22:31:35 -0400 |
| commit | 9cd68fa707cf6372f33eb51a5719dd7626efe5f6 (patch) | |
| tree | 66cde27bd288e011a6e4cff87d342666399a1266 /arch/arm/mach-omap2/gpmc-nand.c | |
| parent | 5698bd757d55b1bb87edd1a9744ab09c142abfc2 (diff) | |
| parent | 76a5d9bfc42d60e9a672e0cae776157a60970f4e (diff) | |
Merge tag 'omap-devel-b-c-2-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into devel-late
OMAP patches intended for the 3.7 merge window:
- Runtime PM conversions for the GPMC and RNG IP blocks
- Preparation patches for the OMAP common clock framework conversion
- clkdev alias additions required by other drivers
- Performance Monitoring Unit (PMU) support for OMAP2, 3, and non-4430 OMAP4
- OMAP hwmod code and data improvements
- Preparation patches for the IOMMU runtime PM conversion
- Preparation patches for OMAP4 full-chip retention support
Based on a merge of v3.6-rc6, the omap-cleanup-b-for-3.7 tag
(7852ec0536ca39cefffc6301dc77f8ae55592926),the cleanup-fixes-for-v3.7
tag (de6ca33a96a6bf61fcb91d3d399703e19ead9d1e), and the
omap-devel-am33xx-for-v3.7 tag
(11964f53eb4d9ce59a058be9999d9cfcb1ced878), due to dependencies.
These patches have been tested for meaningful warnings from
checkpatch, sparse, smatch, and cppcheck. Basic build, boot[1], and
PM test logs are available here:
http://www.pwsan.com/omap/testlogs/hwmod_prcm_clock_a_3.7/20120923173830/
...
1. Note that the N800 boot fails due to a known issue present in the
base commit:
http://www.spinics.net/lists/arm-kernel/msg196034.html
Diffstat (limited to 'arch/arm/mach-omap2/gpmc-nand.c')
| -rw-r--r-- | arch/arm/mach-omap2/gpmc-nand.c | 32 |
1 files changed, 25 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c index 386dec8d2351..9e9f47ad6187 100644 --- a/arch/arm/mach-omap2/gpmc-nand.c +++ b/arch/arm/mach-omap2/gpmc-nand.c | |||
| @@ -16,20 +16,28 @@ | |||
| 16 | 16 | ||
| 17 | #include <asm/mach/flash.h> | 17 | #include <asm/mach/flash.h> |
| 18 | 18 | ||
| 19 | #include <plat/cpu.h> | ||
| 20 | #include <plat/nand.h> | 19 | #include <plat/nand.h> |
| 21 | #include <plat/board.h> | ||
| 22 | #include <plat/gpmc.h> | 20 | #include <plat/gpmc.h> |
| 23 | 21 | ||
| 24 | static struct resource gpmc_nand_resource = { | 22 | #include "soc.h" |
| 25 | .flags = IORESOURCE_MEM, | 23 | |
| 24 | static struct resource gpmc_nand_resource[] = { | ||
| 25 | { | ||
| 26 | .flags = IORESOURCE_MEM, | ||
| 27 | }, | ||
| 28 | { | ||
| 29 | .flags = IORESOURCE_IRQ, | ||
| 30 | }, | ||
| 31 | { | ||
| 32 | .flags = IORESOURCE_IRQ, | ||
| 33 | }, | ||
| 26 | }; | 34 | }; |
| 27 | 35 | ||
| 28 | static struct platform_device gpmc_nand_device = { | 36 | static struct platform_device gpmc_nand_device = { |
| 29 | .name = "omap2-nand", | 37 | .name = "omap2-nand", |
| 30 | .id = 0, | 38 | .id = 0, |
| 31 | .num_resources = 1, | 39 | .num_resources = ARRAY_SIZE(gpmc_nand_resource), |
| 32 | .resource = &gpmc_nand_resource, | 40 | .resource = gpmc_nand_resource, |
| 33 | }; | 41 | }; |
| 34 | 42 | ||
| 35 | static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data) | 43 | static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data) |
| @@ -75,6 +83,7 @@ static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data | |||
| 75 | gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 0); | 83 | gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 0); |
| 76 | gpmc_cs_configure(gpmc_nand_data->cs, | 84 | gpmc_cs_configure(gpmc_nand_data->cs, |
| 77 | GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND); | 85 | GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND); |
| 86 | gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_WP, 0); | ||
| 78 | err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t); | 87 | err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t); |
| 79 | if (err) | 88 | if (err) |
| 80 | return err; | 89 | return err; |
| @@ -90,12 +99,19 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data) | |||
| 90 | gpmc_nand_device.dev.platform_data = gpmc_nand_data; | 99 | gpmc_nand_device.dev.platform_data = gpmc_nand_data; |
| 91 | 100 | ||
| 92 | err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, | 101 | err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, |
| 93 | &gpmc_nand_data->phys_base); | 102 | (unsigned long *)&gpmc_nand_resource[0].start); |
| 94 | if (err < 0) { | 103 | if (err < 0) { |
| 95 | dev_err(dev, "Cannot request GPMC CS\n"); | 104 | dev_err(dev, "Cannot request GPMC CS\n"); |
| 96 | return err; | 105 | return err; |
| 97 | } | 106 | } |
| 98 | 107 | ||
| 108 | gpmc_nand_resource[0].end = gpmc_nand_resource[0].start + | ||
| 109 | NAND_IO_SIZE - 1; | ||
| 110 | |||
| 111 | gpmc_nand_resource[1].start = | ||
| 112 | gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE); | ||
| 113 | gpmc_nand_resource[2].start = | ||
| 114 | gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT); | ||
| 99 | /* Set timings in GPMC */ | 115 | /* Set timings in GPMC */ |
| 100 | err = omap2_nand_gpmc_retime(gpmc_nand_data); | 116 | err = omap2_nand_gpmc_retime(gpmc_nand_data); |
| 101 | if (err < 0) { | 117 | if (err < 0) { |
| @@ -108,6 +124,8 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data) | |||
| 108 | gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1); | 124 | gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1); |
| 109 | } | 125 | } |
| 110 | 126 | ||
| 127 | gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs); | ||
| 128 | |||
| 111 | err = platform_device_register(&gpmc_nand_device); | 129 | err = platform_device_register(&gpmc_nand_device); |
| 112 | if (err < 0) { | 130 | if (err < 0) { |
| 113 | dev_err(dev, "Unable to register NAND device\n"); | 131 | dev_err(dev, "Unable to register NAND device\n"); |
