diff options
author | Jon Hunter <jon-hunter@ti.com> | 2011-10-07 02:53:01 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2011-10-07 03:01:22 -0400 |
commit | 49642ac816a714f3037b7cd6401a46c8fe46e795 (patch) | |
tree | 1bfd6d38e653f257ef83a8dcba73d413620bf872 /arch/arm/mach-omap2/dpll3xxx.c | |
parent | 273a1ce9cf27ac3900325b59aa78cc07bb574e9e (diff) |
ARM: OMAP3+: dpll: use DPLLs recalc function instead of omap2_get_dpll_rate
This is a continuation of Mike Turquette's patch "OMAP3+: use
DPLL's round_rate when setting rate".
omap3_noncore_dpll_set_rate() and omap3_noncore_dpll_enable() call
omap2_get_dpll_rate() explicitly. It may be necessary for some
DPLLs to use a different function and so use the DPLLs recalc()
function pointer instead.
An example is the DPLL_ABE on OMAP4 which can have a 4X multiplier
in addition to the usual MN multipler and dividers and therefore
uses a different round_rate and recalc function.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Cc: Mike Turquette <mturquette@ti.com>
Cc: Misael Lopez Cruz <misael.lopez@ti.com>
[paul@pwsan.com: merged this patch with Mike's "use clock's recalc in DPLL
handling" patch; also reported by Misael]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/dpll3xxx.c')
-rw-r--r-- | arch/arm/mach-omap2/dpll3xxx.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c index 73a1595c5f21..fc56745676fa 100644 --- a/arch/arm/mach-omap2/dpll3xxx.c +++ b/arch/arm/mach-omap2/dpll3xxx.c | |||
@@ -390,7 +390,8 @@ int omap3_noncore_dpll_enable(struct clk *clk) | |||
390 | * propagating? | 390 | * propagating? |
391 | */ | 391 | */ |
392 | if (!r) | 392 | if (!r) |
393 | clk->rate = omap2_get_dpll_rate(clk); | 393 | clk->rate = (clk->recalc) ? clk->recalc(clk) : |
394 | omap2_get_dpll_rate(clk); | ||
394 | 395 | ||
395 | return r; | 396 | return r; |
396 | } | 397 | } |
@@ -424,6 +425,7 @@ void omap3_noncore_dpll_disable(struct clk *clk) | |||
424 | int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) | 425 | int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) |
425 | { | 426 | { |
426 | struct clk *new_parent = NULL; | 427 | struct clk *new_parent = NULL; |
428 | unsigned long hw_rate; | ||
427 | u16 freqsel = 0; | 429 | u16 freqsel = 0; |
428 | struct dpll_data *dd; | 430 | struct dpll_data *dd; |
429 | int ret; | 431 | int ret; |
@@ -435,7 +437,8 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) | |||
435 | if (!dd) | 437 | if (!dd) |
436 | return -EINVAL; | 438 | return -EINVAL; |
437 | 439 | ||
438 | if (rate == omap2_get_dpll_rate(clk)) | 440 | hw_rate = (clk->recalc) ? clk->recalc(clk) : omap2_get_dpll_rate(clk); |
441 | if (rate == hw_rate) | ||
439 | return 0; | 442 | return 0; |
440 | 443 | ||
441 | /* | 444 | /* |