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authorSanjeev Premi <premi@ti.com>2009-03-13 12:04:25 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2009-11-11 17:42:49 -0500
commit8e431edb60ef175e6aa986e8260b23cc267a13fb (patch)
tree9957e477088ecf387e6409ce175029d4006652b0 /arch/arm/mach-omap2/cpuidle34xx.c
parent06d8f065b3bac1673825be744d22742ad72f9c2a (diff)
OMAP3: PM: CPUidle: Start C-state definitions from base 0
The current definition of C-states starts from base 1. Whereas, the cpuidle driver uses base 0. This patch eliminates need for explicit mapping (add/ sbutract) due to different base values. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-omap2/cpuidle34xx.c')
-rw-r--r--arch/arm/mach-omap2/cpuidle34xx.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c
index c11377ddc189..5128b8c26b09 100644
--- a/arch/arm/mach-omap2/cpuidle34xx.c
+++ b/arch/arm/mach-omap2/cpuidle34xx.c
@@ -35,14 +35,14 @@
35 35
36#ifdef CONFIG_CPU_IDLE 36#ifdef CONFIG_CPU_IDLE
37 37
38#define OMAP3_MAX_STATES 8 38#define OMAP3_MAX_STATES 7
39#define OMAP3_STATE_C1 1 /* C1 - MPU WFI + Core active */ 39#define OMAP3_STATE_C1 0 /* C1 - MPU WFI + Core active */
40#define OMAP3_STATE_C2 2 /* C2 - MPU WFI + Core inactive */ 40#define OMAP3_STATE_C2 1 /* C2 - MPU WFI + Core inactive */
41#define OMAP3_STATE_C3 3 /* C3 - MPU CSWR + Core inactive */ 41#define OMAP3_STATE_C3 2 /* C3 - MPU CSWR + Core inactive */
42#define OMAP3_STATE_C4 4 /* C4 - MPU OFF + Core iactive */ 42#define OMAP3_STATE_C4 3 /* C4 - MPU OFF + Core iactive */
43#define OMAP3_STATE_C5 5 /* C5 - MPU RET + Core RET */ 43#define OMAP3_STATE_C5 4 /* C5 - MPU RET + Core RET */
44#define OMAP3_STATE_C6 6 /* C6 - MPU OFF + Core RET */ 44#define OMAP3_STATE_C6 5 /* C6 - MPU OFF + Core RET */
45#define OMAP3_STATE_C7 7 /* C7 - MPU OFF + Core OFF */ 45#define OMAP3_STATE_C7 6 /* C7 - MPU OFF + Core OFF */
46 46
47struct omap3_processor_cx { 47struct omap3_processor_cx {
48 u8 valid; 48 u8 valid;
@@ -279,7 +279,7 @@ int __init omap3_idle_init(void)
279 279
280 dev = &per_cpu(omap3_idle_dev, smp_processor_id()); 280 dev = &per_cpu(omap3_idle_dev, smp_processor_id());
281 281
282 for (i = 1; i < OMAP3_MAX_STATES; i++) { 282 for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) {
283 cx = &omap3_power_states[i]; 283 cx = &omap3_power_states[i];
284 state = &dev->states[count]; 284 state = &dev->states[count];
285 285