aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/control.c
diff options
context:
space:
mode:
authorPaul Walmsley <paul@pwsan.com>2008-03-18 04:02:50 -0400
committerTony Lindgren <tony@atomide.com>2008-04-14 13:27:25 -0400
commit69d88a00a240fbed07fb6943c862ea3188e9097d (patch)
tree7656c3266f5e0b2ce6f92f5f0bb843126989a9bb /arch/arm/mach-omap2/control.c
parent9330899e0f878ff3b7a23b856de8bbb52c9c04fd (diff)
ARM: OMAP2: Add common register access for 24xx and 34xx
This patch adds common register access for 24xx and 34xx power and clock management in order to share code between 24xx and 34xx. Only change USB platform init code to use new register access, other access will be changed in later patches. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/control.c')
-rw-r--r--arch/arm/mach-omap2/control.c74
1 files changed, 74 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/control.c b/arch/arm/mach-omap2/control.c
new file mode 100644
index 000000000000..a5d86a49c213
--- /dev/null
+++ b/arch/arm/mach-omap2/control.c
@@ -0,0 +1,74 @@
1/*
2 * OMAP2/3 System Control Module register access
3 *
4 * Copyright (C) 2007 Texas Instruments, Inc.
5 * Copyright (C) 2007 Nokia Corporation
6 *
7 * Written by Paul Walmsley
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#undef DEBUG
14
15#include <linux/kernel.h>
16
17#include <asm/io.h>
18
19#include <asm/arch/control.h>
20
21static u32 omap2_ctrl_base;
22
23#define OMAP_CTRL_REGADDR(reg) (void __iomem *)IO_ADDRESS(omap2_ctrl_base \
24 + (reg))
25
26void omap_ctrl_base_set(u32 base)
27{
28 omap2_ctrl_base = base;
29}
30
31u32 omap_ctrl_base_get(void)
32{
33 return omap2_ctrl_base;
34}
35
36u8 omap_ctrl_readb(u16 offset)
37{
38 return __raw_readb(OMAP_CTRL_REGADDR(offset));
39}
40
41u16 omap_ctrl_readw(u16 offset)
42{
43 return __raw_readw(OMAP_CTRL_REGADDR(offset));
44}
45
46u32 omap_ctrl_readl(u16 offset)
47{
48 return __raw_readl(OMAP_CTRL_REGADDR(offset));
49}
50
51void omap_ctrl_writeb(u8 val, u16 offset)
52{
53 pr_debug("omap_ctrl_writeb: writing 0x%0x to 0x%0x\n", val,
54 (u32)OMAP_CTRL_REGADDR(offset));
55
56 __raw_writeb(val, OMAP_CTRL_REGADDR(offset));
57}
58
59void omap_ctrl_writew(u16 val, u16 offset)
60{
61 pr_debug("omap_ctrl_writew: writing 0x%0x to 0x%0x\n", val,
62 (u32)OMAP_CTRL_REGADDR(offset));
63
64 __raw_writew(val, OMAP_CTRL_REGADDR(offset));
65}
66
67void omap_ctrl_writel(u32 val, u16 offset)
68{
69 pr_debug("omap_ctrl_writel: writing 0x%0x to 0x%0x\n", val,
70 (u32)OMAP_CTRL_REGADDR(offset));
71
72 __raw_writel(val, OMAP_CTRL_REGADDR(offset));
73}
74