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authorPaul Walmsley <paul@pwsan.com>2010-12-21 23:05:14 -0500
committerPaul Walmsley <paul@pwsan.com>2010-12-21 23:05:14 -0500
commit2ace831ffc8feaffb8bc03da89ff43d948efdc97 (patch)
tree4a75814c417ffe94dd2505585305378b7f04b40e /arch/arm/mach-omap2/cminst44xx.c
parentf0611a5c220e50dec65041b10bd2fe9484f061a6 (diff)
OMAP4: PRCM: add OMAP4-specific accessor/mutator functions
In some ways, the OMAP4 PRCM register layout is quite different than the OMAP2/3 PRCM register layout. For example, on OMAP2/3, from a register layout point of view, all CM instances were located in the CM subsystem, and all PRM instances were located in the PRM subsystem. OMAP4 changes this. Now, for example, some CM instances, such as WKUP_CM and EMU_CM, are located in the system PRM subsystem. And a "local PRCM" exists for the MPU - this PRCM combines registers that would normally appear in both CM and PRM instances, but uses its own register layout which matches neither the OMAP2/3 PRCM layout nor the OMAP4 PRCM layout. To try to deal with this, introduce some new functions, omap4_cminst* and omap4_prminst*. The former is to be used when writing to a CM instance register (no matter what subsystem or hardware module it exists in), and the latter, similarly, with PRM instance registers. To determine which "PRCM partition" to write to, the functions take a PRCM instance ID argument. Subsequent patches add these partition IDs to the OMAP4 powerdomain and clockdomain definitions. As far as I can see, there's really no good way to handle these types of register access inconsistencies. This patch seemed like the least bad approach. Moving forward, the long-term goal is to remove all direct PRCM register access from the PM code. PRCM register access should go through layers such as the powerdomain and clockdomain code that can hide the details of how to interact with the specific hardware variant. While here, rename cm4xxx.c to cm44xx.c to match the naming convention of the other OMAP4 PRCM files. Thanks to Santosh Shilimkar <santosh.shilimkar@ti.com>, Rajendra Nayak <rnayak@ti.com>, and Benoît Cousson <b-cousson@ti.com> for some comments. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoît Cousson <b-cousson@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/cminst44xx.c')
-rw-r--r--arch/arm/mach-omap2/cminst44xx.c109
1 files changed, 109 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
new file mode 100644
index 000000000000..c13613b513b5
--- /dev/null
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -0,0 +1,109 @@
1/*
2 * OMAP4 CM instance functions
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Paul Walmsley
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This is needed since CM instances can be in the PRM, PRCM_MPU, CM1,
12 * or CM2 hardware modules. For example, the EMU_CM CM instance is in
13 * the PRM hardware module. What a mess...
14 */
15
16#include <linux/kernel.h>
17#include <linux/types.h>
18#include <linux/errno.h>
19#include <linux/err.h>
20#include <linux/io.h>
21
22#include <plat/common.h>
23
24#include "cm.h"
25#include "cm1_44xx.h"
26#include "cm2_44xx.h"
27#include "cm44xx.h"
28#include "cminst44xx.h"
29#include "cm-regbits-44xx.h"
30#include "prcm44xx.h"
31#include "prm44xx.h"
32#include "prcm_mpu44xx.h"
33
34static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = {
35 [OMAP4430_INVALID_PRCM_PARTITION] = 0,
36 [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE,
37 [OMAP4430_CM1_PARTITION] = OMAP4430_CM1_BASE,
38 [OMAP4430_CM2_PARTITION] = OMAP4430_CM2_BASE,
39 [OMAP4430_SCRM_PARTITION] = 0,
40 [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE,
41};
42
43/* Read a register in a CM instance */
44u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx)
45{
46 BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
47 part == OMAP4430_INVALID_PRCM_PARTITION ||
48 !_cm_bases[part]);
49 return __raw_readl(OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx));
50}
51
52/* Write into a register in a CM instance */
53void omap4_cminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx)
54{
55 BUG_ON(part >= OMAP4_MAX_PRCM_PARTITIONS ||
56 part == OMAP4430_INVALID_PRCM_PARTITION ||
57 !_cm_bases[part]);
58 __raw_writel(val, OMAP2_L4_IO_ADDRESS(_cm_bases[part] + inst + idx));
59}
60
61/* Read-modify-write a register in CM1. Caller must lock */
62u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst,
63 s16 idx)
64{
65 u32 v;
66
67 v = omap4_cminst_read_inst_reg(part, inst, idx);
68 v &= ~mask;
69 v |= bits;
70 omap4_cminst_write_inst_reg(v, part, inst, idx);
71
72 return v;
73}
74
75
76/**
77 * omap4_cm_wait_module_ready - wait for a module to be in 'func' state
78 * @clkctrl_reg: CLKCTRL module address
79 *
80 * Wait for the module IDLEST to be functional. If the idle state is in any
81 * the non functional state (trans, idle or disabled), module and thus the
82 * sysconfig cannot be accessed and will probably lead to an "imprecise
83 * external abort"
84 *
85 * Module idle state:
86 * 0x0 func: Module is fully functional, including OCP
87 * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep
88 * abortion
89 * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if
90 * using separate functional clock
91 * 0x3 disabled: Module is disabled and cannot be accessed
92 *
93 */
94int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg)
95{
96 int i = 0;
97
98 if (!clkctrl_reg)
99 return 0;
100
101 omap_test_timeout((
102 ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0) ||
103 (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >>
104 OMAP4430_IDLEST_SHIFT) == 0x2)),
105 MAX_MODULE_READY_TIME, i);
106
107 return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
108}
109