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authorTero Kristo <t-kristo@ti.com>2014-10-27 11:39:23 -0400
committerTony Lindgren <tony@atomide.com>2014-10-27 11:39:23 -0400
commit9907f85eb27d98c2184a56f3b636cb82536807a0 (patch)
tree15b7771a6bb7f686f2be9bfc7bed0d32fa4c5318 /arch/arm/mach-omap2/cm33xx.c
parent9002e921aa9a97de9de86fad34917c573dfc822b (diff)
ARM: AM33xx/OMAP4+: CM: remove cdoffs parameter from wait_module_idle/ready
This is not needed for anything. This also eases the consolidation of the wait_module_ready / wait_module_idle calls behind a generic CM driver API by reducing the number of needed parameters. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/cm33xx.c')
-rw-r--r--arch/arm/mach-omap2/cm33xx.c18
1 files changed, 7 insertions, 11 deletions
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index b3f99e93def0..ef9e9018f4d5 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -96,13 +96,12 @@ static inline u32 am33xx_cm_read_reg_bits(u16 inst, s16 idx, u32 mask)
96/** 96/**
97 * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield 97 * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield
98 * @inst: CM instance register offset (*_INST macro) 98 * @inst: CM instance register offset (*_INST macro)
99 * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
100 * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) 99 * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
101 * 100 *
102 * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to 101 * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to
103 * bit 0. 102 * bit 0.
104 */ 103 */
105static u32 _clkctrl_idlest(u16 inst, s16 cdoffs, u16 clkctrl_offs) 104static u32 _clkctrl_idlest(u16 inst, u16 clkctrl_offs)
106{ 105{
107 u32 v = am33xx_cm_read_reg(inst, clkctrl_offs); 106 u32 v = am33xx_cm_read_reg(inst, clkctrl_offs);
108 v &= AM33XX_IDLEST_MASK; 107 v &= AM33XX_IDLEST_MASK;
@@ -113,17 +112,16 @@ static u32 _clkctrl_idlest(u16 inst, s16 cdoffs, u16 clkctrl_offs)
113/** 112/**
114 * _is_module_ready - can module registers be accessed without causing an abort? 113 * _is_module_ready - can module registers be accessed without causing an abort?
115 * @inst: CM instance register offset (*_INST macro) 114 * @inst: CM instance register offset (*_INST macro)
116 * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
117 * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) 115 * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
118 * 116 *
119 * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either 117 * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either
120 * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise. 118 * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise.
121 */ 119 */
122static bool _is_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs) 120static bool _is_module_ready(u16 inst, u16 clkctrl_offs)
123{ 121{
124 u32 v; 122 u32 v;
125 123
126 v = _clkctrl_idlest(inst, cdoffs, clkctrl_offs); 124 v = _clkctrl_idlest(inst, clkctrl_offs);
127 125
128 return (v == CLKCTRL_IDLEST_FUNCTIONAL || 126 return (v == CLKCTRL_IDLEST_FUNCTIONAL ||
129 v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false; 127 v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false;
@@ -229,7 +227,6 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
229/** 227/**
230 * am33xx_cm_wait_module_ready - wait for a module to be in 'func' state 228 * am33xx_cm_wait_module_ready - wait for a module to be in 'func' state
231 * @inst: CM instance register offset (*_INST macro) 229 * @inst: CM instance register offset (*_INST macro)
232 * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
233 * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) 230 * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
234 * 231 *
235 * Wait for the module IDLEST to be functional. If the idle state is in any 232 * Wait for the module IDLEST to be functional. If the idle state is in any
@@ -237,11 +234,11 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
237 * sysconfig cannot be accessed and will probably lead to an "imprecise 234 * sysconfig cannot be accessed and will probably lead to an "imprecise
238 * external abort" 235 * external abort"
239 */ 236 */
240int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs) 237int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs)
241{ 238{
242 int i = 0; 239 int i = 0;
243 240
244 omap_test_timeout(_is_module_ready(inst, cdoffs, clkctrl_offs), 241 omap_test_timeout(_is_module_ready(inst, clkctrl_offs),
245 MAX_MODULE_READY_TIME, i); 242 MAX_MODULE_READY_TIME, i);
246 243
247 return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; 244 return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
@@ -251,21 +248,20 @@ int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
251 * am33xx_cm_wait_module_idle - wait for a module to be in 'disabled' 248 * am33xx_cm_wait_module_idle - wait for a module to be in 'disabled'
252 * state 249 * state
253 * @inst: CM instance register offset (*_INST macro) 250 * @inst: CM instance register offset (*_INST macro)
254 * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
255 * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) 251 * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
256 * 252 *
257 * Wait for the module IDLEST to be disabled. Some PRCM transition, 253 * Wait for the module IDLEST to be disabled. Some PRCM transition,
258 * like reset assertion or parent clock de-activation must wait the 254 * like reset assertion or parent clock de-activation must wait the
259 * module to be fully disabled. 255 * module to be fully disabled.
260 */ 256 */
261int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, u16 clkctrl_offs) 257int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
262{ 258{
263 int i = 0; 259 int i = 0;
264 260
265 if (!clkctrl_offs) 261 if (!clkctrl_offs)
266 return 0; 262 return 0;
267 263
268 omap_test_timeout((_clkctrl_idlest(inst, cdoffs, clkctrl_offs) == 264 omap_test_timeout((_clkctrl_idlest(inst, clkctrl_offs) ==
269 CLKCTRL_IDLEST_DISABLED), 265 CLKCTRL_IDLEST_DISABLED),
270 MAX_MODULE_READY_TIME, i); 266 MAX_MODULE_READY_TIME, i);
271 267