diff options
author | Paul Walmsley <paul@pwsan.com> | 2010-12-21 23:05:14 -0500 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2010-12-21 23:05:14 -0500 |
commit | c4d7e58fb52c632d8e33cd23a4917d7a7f8302ac (patch) | |
tree | 20a56db9f93ff411fc439ea1961b1e51f2ecf15b /arch/arm/mach-omap2/cm2xxx_3xxx.c | |
parent | dac9a77120e2724e22696f06f3ecb4838da1e3e4 (diff) |
OMAP2/3: PRM/CM: prefix OMAP2 PRM/CM functions with "omap2_"
Now that OMAP4-specific PRCM functions have been added, distinguish the
existing OMAP2/3-specific PRCM functions by prefixing them with "omap2_".
This patch should not result in any functional change.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jarkko Nikula <jhnikula@gmail.com>
Cc: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Cc: Liam Girdwood <lrg@slimlogic.co.uk>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/cm2xxx_3xxx.c')
-rw-r--r-- | arch/arm/mach-omap2/cm2xxx_3xxx.c | 352 |
1 files changed, 181 insertions, 171 deletions
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c index 1c98dfc93a83..e3d598a4c624 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c | |||
@@ -29,37 +29,37 @@ static const u8 cm_idlest_offs[] = { | |||
29 | CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3 | 29 | CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3 |
30 | }; | 30 | }; |
31 | 31 | ||
32 | u32 cm_read_mod_reg(s16 module, u16 idx) | 32 | u32 omap2_cm_read_mod_reg(s16 module, u16 idx) |
33 | { | 33 | { |
34 | return __raw_readl(cm_base + module + idx); | 34 | return __raw_readl(cm_base + module + idx); |
35 | } | 35 | } |
36 | 36 | ||
37 | void cm_write_mod_reg(u32 val, s16 module, u16 idx) | 37 | void omap2_cm_write_mod_reg(u32 val, s16 module, u16 idx) |
38 | { | 38 | { |
39 | __raw_writel(val, cm_base + module + idx); | 39 | __raw_writel(val, cm_base + module + idx); |
40 | } | 40 | } |
41 | 41 | ||
42 | /* Read-modify-write a register in a CM module. Caller must lock */ | 42 | /* Read-modify-write a register in a CM module. Caller must lock */ |
43 | u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx) | 43 | u32 omap2_cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx) |
44 | { | 44 | { |
45 | u32 v; | 45 | u32 v; |
46 | 46 | ||
47 | v = cm_read_mod_reg(module, idx); | 47 | v = omap2_cm_read_mod_reg(module, idx); |
48 | v &= ~mask; | 48 | v &= ~mask; |
49 | v |= bits; | 49 | v |= bits; |
50 | cm_write_mod_reg(v, module, idx); | 50 | omap2_cm_write_mod_reg(v, module, idx); |
51 | 51 | ||
52 | return v; | 52 | return v; |
53 | } | 53 | } |
54 | 54 | ||
55 | u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) | 55 | u32 omap2_cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx) |
56 | { | 56 | { |
57 | return cm_rmw_mod_reg_bits(bits, bits, module, idx); | 57 | return omap2_cm_rmw_mod_reg_bits(bits, bits, module, idx); |
58 | } | 58 | } |
59 | 59 | ||
60 | u32 cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) | 60 | u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) |
61 | { | 61 | { |
62 | return cm_rmw_mod_reg_bits(bits, 0x0, module, idx); | 62 | return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx); |
63 | } | 63 | } |
64 | 64 | ||
65 | /** | 65 | /** |
@@ -90,7 +90,7 @@ int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift) | |||
90 | else | 90 | else |
91 | BUG(); | 91 | BUG(); |
92 | 92 | ||
93 | omap_test_timeout(((cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) == ena), | 93 | omap_test_timeout(((omap2_cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) == ena), |
94 | MAX_MODULE_READY_TIME, i); | 94 | MAX_MODULE_READY_TIME, i); |
95 | 95 | ||
96 | return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; | 96 | return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; |
@@ -166,228 +166,238 @@ static struct omap3_cm_regs cm_context; | |||
166 | void omap3_cm_save_context(void) | 166 | void omap3_cm_save_context(void) |
167 | { | 167 | { |
168 | cm_context.iva2_cm_clksel1 = | 168 | cm_context.iva2_cm_clksel1 = |
169 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL1); | 169 | omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL1); |
170 | cm_context.iva2_cm_clksel2 = | 170 | cm_context.iva2_cm_clksel2 = |
171 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL2); | 171 | omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL2); |
172 | cm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG); | 172 | cm_context.cm_sysconfig = __raw_readl(OMAP3430_CM_SYSCONFIG); |
173 | cm_context.sgx_cm_clksel = | 173 | cm_context.sgx_cm_clksel = |
174 | cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL); | 174 | omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL); |
175 | cm_context.dss_cm_clksel = | 175 | cm_context.dss_cm_clksel = |
176 | cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL); | 176 | omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, CM_CLKSEL); |
177 | cm_context.cam_cm_clksel = | 177 | cm_context.cam_cm_clksel = |
178 | cm_read_mod_reg(OMAP3430_CAM_MOD, CM_CLKSEL); | 178 | omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, CM_CLKSEL); |
179 | cm_context.per_cm_clksel = | 179 | cm_context.per_cm_clksel = |
180 | cm_read_mod_reg(OMAP3430_PER_MOD, CM_CLKSEL); | 180 | omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_CLKSEL); |
181 | cm_context.emu_cm_clksel = | 181 | cm_context.emu_cm_clksel = |
182 | cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1); | 182 | omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, CM_CLKSEL1); |
183 | cm_context.emu_cm_clkstctrl = | 183 | cm_context.emu_cm_clkstctrl = |
184 | cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL); | 184 | omap2_cm_read_mod_reg(OMAP3430_EMU_MOD, OMAP2_CM_CLKSTCTRL); |
185 | cm_context.pll_cm_autoidle2 = | 185 | cm_context.pll_cm_autoidle2 = |
186 | cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2); | 186 | omap2_cm_read_mod_reg(PLL_MOD, CM_AUTOIDLE2); |
187 | cm_context.pll_cm_clksel4 = | 187 | cm_context.pll_cm_clksel4 = |
188 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4); | 188 | omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL4); |
189 | cm_context.pll_cm_clksel5 = | 189 | cm_context.pll_cm_clksel5 = |
190 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5); | 190 | omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5); |
191 | cm_context.pll_cm_clken2 = | 191 | cm_context.pll_cm_clken2 = |
192 | cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2); | 192 | omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2); |
193 | cm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL); | 193 | cm_context.cm_polctrl = __raw_readl(OMAP3430_CM_POLCTRL); |
194 | cm_context.iva2_cm_fclken = | 194 | cm_context.iva2_cm_fclken = |
195 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_FCLKEN); | 195 | omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_FCLKEN); |
196 | cm_context.iva2_cm_clken_pll = cm_read_mod_reg(OMAP3430_IVA2_MOD, | 196 | cm_context.iva2_cm_clken_pll = |
197 | OMAP3430_CM_CLKEN_PLL); | 197 | omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKEN_PLL); |
198 | cm_context.core_cm_fclken1 = | 198 | cm_context.core_cm_fclken1 = |
199 | cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); | 199 | omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); |
200 | cm_context.core_cm_fclken3 = | 200 | cm_context.core_cm_fclken3 = |
201 | cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3); | 201 | omap2_cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3); |
202 | cm_context.sgx_cm_fclken = | 202 | cm_context.sgx_cm_fclken = |
203 | cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_FCLKEN); | 203 | omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_FCLKEN); |
204 | cm_context.wkup_cm_fclken = | 204 | cm_context.wkup_cm_fclken = |
205 | cm_read_mod_reg(WKUP_MOD, CM_FCLKEN); | 205 | omap2_cm_read_mod_reg(WKUP_MOD, CM_FCLKEN); |
206 | cm_context.dss_cm_fclken = | 206 | cm_context.dss_cm_fclken = |
207 | cm_read_mod_reg(OMAP3430_DSS_MOD, CM_FCLKEN); | 207 | omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, CM_FCLKEN); |
208 | cm_context.cam_cm_fclken = | 208 | cm_context.cam_cm_fclken = |
209 | cm_read_mod_reg(OMAP3430_CAM_MOD, CM_FCLKEN); | 209 | omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, CM_FCLKEN); |
210 | cm_context.per_cm_fclken = | 210 | cm_context.per_cm_fclken = |
211 | cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN); | 211 | omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN); |
212 | cm_context.usbhost_cm_fclken = | 212 | cm_context.usbhost_cm_fclken = |
213 | cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN); | 213 | omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN); |
214 | cm_context.core_cm_iclken1 = | 214 | cm_context.core_cm_iclken1 = |
215 | cm_read_mod_reg(CORE_MOD, CM_ICLKEN1); | 215 | omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN1); |
216 | cm_context.core_cm_iclken2 = | 216 | cm_context.core_cm_iclken2 = |
217 | cm_read_mod_reg(CORE_MOD, CM_ICLKEN2); | 217 | omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN2); |
218 | cm_context.core_cm_iclken3 = | 218 | cm_context.core_cm_iclken3 = |
219 | cm_read_mod_reg(CORE_MOD, CM_ICLKEN3); | 219 | omap2_cm_read_mod_reg(CORE_MOD, CM_ICLKEN3); |
220 | cm_context.sgx_cm_iclken = | 220 | cm_context.sgx_cm_iclken = |
221 | cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_ICLKEN); | 221 | omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_ICLKEN); |
222 | cm_context.wkup_cm_iclken = | 222 | cm_context.wkup_cm_iclken = |
223 | cm_read_mod_reg(WKUP_MOD, CM_ICLKEN); | 223 | omap2_cm_read_mod_reg(WKUP_MOD, CM_ICLKEN); |
224 | cm_context.dss_cm_iclken = | 224 | cm_context.dss_cm_iclken = |
225 | cm_read_mod_reg(OMAP3430_DSS_MOD, CM_ICLKEN); | 225 | omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, CM_ICLKEN); |
226 | cm_context.cam_cm_iclken = | 226 | cm_context.cam_cm_iclken = |
227 | cm_read_mod_reg(OMAP3430_CAM_MOD, CM_ICLKEN); | 227 | omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, CM_ICLKEN); |
228 | cm_context.per_cm_iclken = | 228 | cm_context.per_cm_iclken = |
229 | cm_read_mod_reg(OMAP3430_PER_MOD, CM_ICLKEN); | 229 | omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_ICLKEN); |
230 | cm_context.usbhost_cm_iclken = | 230 | cm_context.usbhost_cm_iclken = |
231 | cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN); | 231 | omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN); |
232 | cm_context.iva2_cm_autoidle2 = | 232 | cm_context.iva2_cm_autoidle2 = |
233 | cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2); | 233 | omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_AUTOIDLE2); |
234 | cm_context.mpu_cm_autoidle2 = | 234 | cm_context.mpu_cm_autoidle2 = |
235 | cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2); | 235 | omap2_cm_read_mod_reg(MPU_MOD, CM_AUTOIDLE2); |
236 | cm_context.iva2_cm_clkstctrl = | 236 | cm_context.iva2_cm_clkstctrl = |
237 | cm_read_mod_reg(OMAP3430_IVA2_MOD, OMAP2_CM_CLKSTCTRL); | 237 | omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, OMAP2_CM_CLKSTCTRL); |
238 | cm_context.mpu_cm_clkstctrl = | 238 | cm_context.mpu_cm_clkstctrl = |
239 | cm_read_mod_reg(MPU_MOD, OMAP2_CM_CLKSTCTRL); | 239 | omap2_cm_read_mod_reg(MPU_MOD, OMAP2_CM_CLKSTCTRL); |
240 | cm_context.core_cm_clkstctrl = | 240 | cm_context.core_cm_clkstctrl = |
241 | cm_read_mod_reg(CORE_MOD, OMAP2_CM_CLKSTCTRL); | 241 | omap2_cm_read_mod_reg(CORE_MOD, OMAP2_CM_CLKSTCTRL); |
242 | cm_context.sgx_cm_clkstctrl = | 242 | cm_context.sgx_cm_clkstctrl = |
243 | cm_read_mod_reg(OMAP3430ES2_SGX_MOD, OMAP2_CM_CLKSTCTRL); | 243 | omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, OMAP2_CM_CLKSTCTRL); |
244 | cm_context.dss_cm_clkstctrl = | 244 | cm_context.dss_cm_clkstctrl = |
245 | cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP2_CM_CLKSTCTRL); | 245 | omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP2_CM_CLKSTCTRL); |
246 | cm_context.cam_cm_clkstctrl = | 246 | cm_context.cam_cm_clkstctrl = |
247 | cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP2_CM_CLKSTCTRL); | 247 | omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP2_CM_CLKSTCTRL); |
248 | cm_context.per_cm_clkstctrl = | 248 | cm_context.per_cm_clkstctrl = |
249 | cm_read_mod_reg(OMAP3430_PER_MOD, OMAP2_CM_CLKSTCTRL); | 249 | omap2_cm_read_mod_reg(OMAP3430_PER_MOD, OMAP2_CM_CLKSTCTRL); |
250 | cm_context.neon_cm_clkstctrl = | 250 | cm_context.neon_cm_clkstctrl = |
251 | cm_read_mod_reg(OMAP3430_NEON_MOD, OMAP2_CM_CLKSTCTRL); | 251 | omap2_cm_read_mod_reg(OMAP3430_NEON_MOD, OMAP2_CM_CLKSTCTRL); |
252 | cm_context.usbhost_cm_clkstctrl = | 252 | cm_context.usbhost_cm_clkstctrl = |
253 | cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, OMAP2_CM_CLKSTCTRL); | 253 | omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, |
254 | OMAP2_CM_CLKSTCTRL); | ||
254 | cm_context.core_cm_autoidle1 = | 255 | cm_context.core_cm_autoidle1 = |
255 | cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE1); | 256 | omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE1); |
256 | cm_context.core_cm_autoidle2 = | 257 | cm_context.core_cm_autoidle2 = |
257 | cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE2); | 258 | omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE2); |
258 | cm_context.core_cm_autoidle3 = | 259 | cm_context.core_cm_autoidle3 = |
259 | cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE3); | 260 | omap2_cm_read_mod_reg(CORE_MOD, CM_AUTOIDLE3); |
260 | cm_context.wkup_cm_autoidle = | 261 | cm_context.wkup_cm_autoidle = |
261 | cm_read_mod_reg(WKUP_MOD, CM_AUTOIDLE); | 262 | omap2_cm_read_mod_reg(WKUP_MOD, CM_AUTOIDLE); |
262 | cm_context.dss_cm_autoidle = | 263 | cm_context.dss_cm_autoidle = |
263 | cm_read_mod_reg(OMAP3430_DSS_MOD, CM_AUTOIDLE); | 264 | omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, CM_AUTOIDLE); |
264 | cm_context.cam_cm_autoidle = | 265 | cm_context.cam_cm_autoidle = |
265 | cm_read_mod_reg(OMAP3430_CAM_MOD, CM_AUTOIDLE); | 266 | omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, CM_AUTOIDLE); |
266 | cm_context.per_cm_autoidle = | 267 | cm_context.per_cm_autoidle = |
267 | cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE); | 268 | omap2_cm_read_mod_reg(OMAP3430_PER_MOD, CM_AUTOIDLE); |
268 | cm_context.usbhost_cm_autoidle = | 269 | cm_context.usbhost_cm_autoidle = |
269 | cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE); | 270 | omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE); |
270 | cm_context.sgx_cm_sleepdep = | 271 | cm_context.sgx_cm_sleepdep = |
271 | cm_read_mod_reg(OMAP3430ES2_SGX_MOD, OMAP3430_CM_SLEEPDEP); | 272 | omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, |
273 | OMAP3430_CM_SLEEPDEP); | ||
272 | cm_context.dss_cm_sleepdep = | 274 | cm_context.dss_cm_sleepdep = |
273 | cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP3430_CM_SLEEPDEP); | 275 | omap2_cm_read_mod_reg(OMAP3430_DSS_MOD, OMAP3430_CM_SLEEPDEP); |
274 | cm_context.cam_cm_sleepdep = | 276 | cm_context.cam_cm_sleepdep = |
275 | cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP3430_CM_SLEEPDEP); | 277 | omap2_cm_read_mod_reg(OMAP3430_CAM_MOD, OMAP3430_CM_SLEEPDEP); |
276 | cm_context.per_cm_sleepdep = | 278 | cm_context.per_cm_sleepdep = |
277 | cm_read_mod_reg(OMAP3430_PER_MOD, OMAP3430_CM_SLEEPDEP); | 279 | omap2_cm_read_mod_reg(OMAP3430_PER_MOD, OMAP3430_CM_SLEEPDEP); |
278 | cm_context.usbhost_cm_sleepdep = | 280 | cm_context.usbhost_cm_sleepdep = |
279 | cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_SLEEPDEP); | 281 | omap2_cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, |
282 | OMAP3430_CM_SLEEPDEP); | ||
280 | cm_context.cm_clkout_ctrl = | 283 | cm_context.cm_clkout_ctrl = |
281 | cm_read_mod_reg(OMAP3430_CCR_MOD, OMAP3_CM_CLKOUT_CTRL_OFFSET); | 284 | omap2_cm_read_mod_reg(OMAP3430_CCR_MOD, |
285 | OMAP3_CM_CLKOUT_CTRL_OFFSET); | ||
282 | } | 286 | } |
283 | 287 | ||
284 | void omap3_cm_restore_context(void) | 288 | void omap3_cm_restore_context(void) |
285 | { | 289 | { |
286 | cm_write_mod_reg(cm_context.iva2_cm_clksel1, OMAP3430_IVA2_MOD, | 290 | omap2_cm_write_mod_reg(cm_context.iva2_cm_clksel1, OMAP3430_IVA2_MOD, |
287 | CM_CLKSEL1); | 291 | CM_CLKSEL1); |
288 | cm_write_mod_reg(cm_context.iva2_cm_clksel2, OMAP3430_IVA2_MOD, | 292 | omap2_cm_write_mod_reg(cm_context.iva2_cm_clksel2, OMAP3430_IVA2_MOD, |
289 | CM_CLKSEL2); | 293 | CM_CLKSEL2); |
290 | __raw_writel(cm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG); | 294 | __raw_writel(cm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG); |
291 | cm_write_mod_reg(cm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD, | 295 | omap2_cm_write_mod_reg(cm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD, |
292 | CM_CLKSEL); | 296 | CM_CLKSEL); |
293 | cm_write_mod_reg(cm_context.dss_cm_clksel, OMAP3430_DSS_MOD, | 297 | omap2_cm_write_mod_reg(cm_context.dss_cm_clksel, OMAP3430_DSS_MOD, |
294 | CM_CLKSEL); | 298 | CM_CLKSEL); |
295 | cm_write_mod_reg(cm_context.cam_cm_clksel, OMAP3430_CAM_MOD, | 299 | omap2_cm_write_mod_reg(cm_context.cam_cm_clksel, OMAP3430_CAM_MOD, |
296 | CM_CLKSEL); | 300 | CM_CLKSEL); |
297 | cm_write_mod_reg(cm_context.per_cm_clksel, OMAP3430_PER_MOD, | 301 | omap2_cm_write_mod_reg(cm_context.per_cm_clksel, OMAP3430_PER_MOD, |
298 | CM_CLKSEL); | 302 | CM_CLKSEL); |
299 | cm_write_mod_reg(cm_context.emu_cm_clksel, OMAP3430_EMU_MOD, | 303 | omap2_cm_write_mod_reg(cm_context.emu_cm_clksel, OMAP3430_EMU_MOD, |
300 | CM_CLKSEL1); | 304 | CM_CLKSEL1); |
301 | cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD, | 305 | omap2_cm_write_mod_reg(cm_context.emu_cm_clkstctrl, OMAP3430_EMU_MOD, |
302 | OMAP2_CM_CLKSTCTRL); | 306 | OMAP2_CM_CLKSTCTRL); |
303 | cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD, | 307 | omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD, |
304 | CM_AUTOIDLE2); | 308 | CM_AUTOIDLE2); |
305 | cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD, | 309 | omap2_cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD, |
306 | OMAP3430ES2_CM_CLKSEL4); | 310 | OMAP3430ES2_CM_CLKSEL4); |
307 | cm_write_mod_reg(cm_context.pll_cm_clksel5, PLL_MOD, | 311 | omap2_cm_write_mod_reg(cm_context.pll_cm_clksel5, PLL_MOD, |
308 | OMAP3430ES2_CM_CLKSEL5); | 312 | OMAP3430ES2_CM_CLKSEL5); |
309 | cm_write_mod_reg(cm_context.pll_cm_clken2, PLL_MOD, | 313 | omap2_cm_write_mod_reg(cm_context.pll_cm_clken2, PLL_MOD, |
310 | OMAP3430ES2_CM_CLKEN2); | 314 | OMAP3430ES2_CM_CLKEN2); |
311 | __raw_writel(cm_context.cm_polctrl, OMAP3430_CM_POLCTRL); | 315 | __raw_writel(cm_context.cm_polctrl, OMAP3430_CM_POLCTRL); |
312 | cm_write_mod_reg(cm_context.iva2_cm_fclken, OMAP3430_IVA2_MOD, | 316 | omap2_cm_write_mod_reg(cm_context.iva2_cm_fclken, OMAP3430_IVA2_MOD, |
313 | CM_FCLKEN); | 317 | CM_FCLKEN); |
314 | cm_write_mod_reg(cm_context.iva2_cm_clken_pll, OMAP3430_IVA2_MOD, | 318 | omap2_cm_write_mod_reg(cm_context.iva2_cm_clken_pll, OMAP3430_IVA2_MOD, |
315 | OMAP3430_CM_CLKEN_PLL); | 319 | OMAP3430_CM_CLKEN_PLL); |
316 | cm_write_mod_reg(cm_context.core_cm_fclken1, CORE_MOD, CM_FCLKEN1); | 320 | omap2_cm_write_mod_reg(cm_context.core_cm_fclken1, CORE_MOD, |
317 | cm_write_mod_reg(cm_context.core_cm_fclken3, CORE_MOD, | 321 | CM_FCLKEN1); |
318 | OMAP3430ES2_CM_FCLKEN3); | 322 | omap2_cm_write_mod_reg(cm_context.core_cm_fclken3, CORE_MOD, |
319 | cm_write_mod_reg(cm_context.sgx_cm_fclken, OMAP3430ES2_SGX_MOD, | 323 | OMAP3430ES2_CM_FCLKEN3); |
320 | CM_FCLKEN); | 324 | omap2_cm_write_mod_reg(cm_context.sgx_cm_fclken, OMAP3430ES2_SGX_MOD, |
321 | cm_write_mod_reg(cm_context.wkup_cm_fclken, WKUP_MOD, CM_FCLKEN); | 325 | CM_FCLKEN); |
322 | cm_write_mod_reg(cm_context.dss_cm_fclken, OMAP3430_DSS_MOD, | 326 | omap2_cm_write_mod_reg(cm_context.wkup_cm_fclken, WKUP_MOD, CM_FCLKEN); |
323 | CM_FCLKEN); | 327 | omap2_cm_write_mod_reg(cm_context.dss_cm_fclken, OMAP3430_DSS_MOD, |
324 | cm_write_mod_reg(cm_context.cam_cm_fclken, OMAP3430_CAM_MOD, | 328 | CM_FCLKEN); |
325 | CM_FCLKEN); | 329 | omap2_cm_write_mod_reg(cm_context.cam_cm_fclken, OMAP3430_CAM_MOD, |
326 | cm_write_mod_reg(cm_context.per_cm_fclken, OMAP3430_PER_MOD, | 330 | CM_FCLKEN); |
327 | CM_FCLKEN); | 331 | omap2_cm_write_mod_reg(cm_context.per_cm_fclken, OMAP3430_PER_MOD, |
328 | cm_write_mod_reg(cm_context.usbhost_cm_fclken, | 332 | CM_FCLKEN); |
329 | OMAP3430ES2_USBHOST_MOD, CM_FCLKEN); | 333 | omap2_cm_write_mod_reg(cm_context.usbhost_cm_fclken, |
330 | cm_write_mod_reg(cm_context.core_cm_iclken1, CORE_MOD, CM_ICLKEN1); | 334 | OMAP3430ES2_USBHOST_MOD, CM_FCLKEN); |
331 | cm_write_mod_reg(cm_context.core_cm_iclken2, CORE_MOD, CM_ICLKEN2); | 335 | omap2_cm_write_mod_reg(cm_context.core_cm_iclken1, CORE_MOD, |
332 | cm_write_mod_reg(cm_context.core_cm_iclken3, CORE_MOD, CM_ICLKEN3); | 336 | CM_ICLKEN1); |
333 | cm_write_mod_reg(cm_context.sgx_cm_iclken, OMAP3430ES2_SGX_MOD, | 337 | omap2_cm_write_mod_reg(cm_context.core_cm_iclken2, CORE_MOD, |
334 | CM_ICLKEN); | 338 | CM_ICLKEN2); |
335 | cm_write_mod_reg(cm_context.wkup_cm_iclken, WKUP_MOD, CM_ICLKEN); | 339 | omap2_cm_write_mod_reg(cm_context.core_cm_iclken3, CORE_MOD, |
336 | cm_write_mod_reg(cm_context.dss_cm_iclken, OMAP3430_DSS_MOD, | 340 | CM_ICLKEN3); |
337 | CM_ICLKEN); | 341 | omap2_cm_write_mod_reg(cm_context.sgx_cm_iclken, OMAP3430ES2_SGX_MOD, |
338 | cm_write_mod_reg(cm_context.cam_cm_iclken, OMAP3430_CAM_MOD, | 342 | CM_ICLKEN); |
339 | CM_ICLKEN); | 343 | omap2_cm_write_mod_reg(cm_context.wkup_cm_iclken, WKUP_MOD, CM_ICLKEN); |
340 | cm_write_mod_reg(cm_context.per_cm_iclken, OMAP3430_PER_MOD, | 344 | omap2_cm_write_mod_reg(cm_context.dss_cm_iclken, OMAP3430_DSS_MOD, |
341 | CM_ICLKEN); | 345 | CM_ICLKEN); |
342 | cm_write_mod_reg(cm_context.usbhost_cm_iclken, | 346 | omap2_cm_write_mod_reg(cm_context.cam_cm_iclken, OMAP3430_CAM_MOD, |
343 | OMAP3430ES2_USBHOST_MOD, CM_ICLKEN); | 347 | CM_ICLKEN); |
344 | cm_write_mod_reg(cm_context.iva2_cm_autoidle2, OMAP3430_IVA2_MOD, | 348 | omap2_cm_write_mod_reg(cm_context.per_cm_iclken, OMAP3430_PER_MOD, |
345 | CM_AUTOIDLE2); | 349 | CM_ICLKEN); |
346 | cm_write_mod_reg(cm_context.mpu_cm_autoidle2, MPU_MOD, CM_AUTOIDLE2); | 350 | omap2_cm_write_mod_reg(cm_context.usbhost_cm_iclken, |
347 | cm_write_mod_reg(cm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD, | 351 | OMAP3430ES2_USBHOST_MOD, CM_ICLKEN); |
348 | OMAP2_CM_CLKSTCTRL); | 352 | omap2_cm_write_mod_reg(cm_context.iva2_cm_autoidle2, OMAP3430_IVA2_MOD, |
349 | cm_write_mod_reg(cm_context.mpu_cm_clkstctrl, MPU_MOD, | 353 | CM_AUTOIDLE2); |
350 | OMAP2_CM_CLKSTCTRL); | 354 | omap2_cm_write_mod_reg(cm_context.mpu_cm_autoidle2, MPU_MOD, |
351 | cm_write_mod_reg(cm_context.core_cm_clkstctrl, CORE_MOD, | 355 | CM_AUTOIDLE2); |
352 | OMAP2_CM_CLKSTCTRL); | 356 | omap2_cm_write_mod_reg(cm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD, |
353 | cm_write_mod_reg(cm_context.sgx_cm_clkstctrl, OMAP3430ES2_SGX_MOD, | 357 | OMAP2_CM_CLKSTCTRL); |
354 | OMAP2_CM_CLKSTCTRL); | 358 | omap2_cm_write_mod_reg(cm_context.mpu_cm_clkstctrl, MPU_MOD, |
355 | cm_write_mod_reg(cm_context.dss_cm_clkstctrl, OMAP3430_DSS_MOD, | 359 | OMAP2_CM_CLKSTCTRL); |
356 | OMAP2_CM_CLKSTCTRL); | 360 | omap2_cm_write_mod_reg(cm_context.core_cm_clkstctrl, CORE_MOD, |
357 | cm_write_mod_reg(cm_context.cam_cm_clkstctrl, OMAP3430_CAM_MOD, | 361 | OMAP2_CM_CLKSTCTRL); |
358 | OMAP2_CM_CLKSTCTRL); | 362 | omap2_cm_write_mod_reg(cm_context.sgx_cm_clkstctrl, OMAP3430ES2_SGX_MOD, |
359 | cm_write_mod_reg(cm_context.per_cm_clkstctrl, OMAP3430_PER_MOD, | 363 | OMAP2_CM_CLKSTCTRL); |
360 | OMAP2_CM_CLKSTCTRL); | 364 | omap2_cm_write_mod_reg(cm_context.dss_cm_clkstctrl, OMAP3430_DSS_MOD, |
361 | cm_write_mod_reg(cm_context.neon_cm_clkstctrl, OMAP3430_NEON_MOD, | 365 | OMAP2_CM_CLKSTCTRL); |
362 | OMAP2_CM_CLKSTCTRL); | 366 | omap2_cm_write_mod_reg(cm_context.cam_cm_clkstctrl, OMAP3430_CAM_MOD, |
363 | cm_write_mod_reg(cm_context.usbhost_cm_clkstctrl, | 367 | OMAP2_CM_CLKSTCTRL); |
364 | OMAP3430ES2_USBHOST_MOD, OMAP2_CM_CLKSTCTRL); | 368 | omap2_cm_write_mod_reg(cm_context.per_cm_clkstctrl, OMAP3430_PER_MOD, |
365 | cm_write_mod_reg(cm_context.core_cm_autoidle1, CORE_MOD, | 369 | OMAP2_CM_CLKSTCTRL); |
366 | CM_AUTOIDLE1); | 370 | omap2_cm_write_mod_reg(cm_context.neon_cm_clkstctrl, OMAP3430_NEON_MOD, |
367 | cm_write_mod_reg(cm_context.core_cm_autoidle2, CORE_MOD, | 371 | OMAP2_CM_CLKSTCTRL); |
368 | CM_AUTOIDLE2); | 372 | omap2_cm_write_mod_reg(cm_context.usbhost_cm_clkstctrl, |
369 | cm_write_mod_reg(cm_context.core_cm_autoidle3, CORE_MOD, | 373 | OMAP3430ES2_USBHOST_MOD, OMAP2_CM_CLKSTCTRL); |
370 | CM_AUTOIDLE3); | 374 | omap2_cm_write_mod_reg(cm_context.core_cm_autoidle1, CORE_MOD, |
371 | cm_write_mod_reg(cm_context.wkup_cm_autoidle, WKUP_MOD, CM_AUTOIDLE); | 375 | CM_AUTOIDLE1); |
372 | cm_write_mod_reg(cm_context.dss_cm_autoidle, OMAP3430_DSS_MOD, | 376 | omap2_cm_write_mod_reg(cm_context.core_cm_autoidle2, CORE_MOD, |
373 | CM_AUTOIDLE); | 377 | CM_AUTOIDLE2); |
374 | cm_write_mod_reg(cm_context.cam_cm_autoidle, OMAP3430_CAM_MOD, | 378 | omap2_cm_write_mod_reg(cm_context.core_cm_autoidle3, CORE_MOD, |
375 | CM_AUTOIDLE); | 379 | CM_AUTOIDLE3); |
376 | cm_write_mod_reg(cm_context.per_cm_autoidle, OMAP3430_PER_MOD, | 380 | omap2_cm_write_mod_reg(cm_context.wkup_cm_autoidle, WKUP_MOD, |
377 | CM_AUTOIDLE); | 381 | CM_AUTOIDLE); |
378 | cm_write_mod_reg(cm_context.usbhost_cm_autoidle, | 382 | omap2_cm_write_mod_reg(cm_context.dss_cm_autoidle, OMAP3430_DSS_MOD, |
379 | OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE); | 383 | CM_AUTOIDLE); |
380 | cm_write_mod_reg(cm_context.sgx_cm_sleepdep, OMAP3430ES2_SGX_MOD, | 384 | omap2_cm_write_mod_reg(cm_context.cam_cm_autoidle, OMAP3430_CAM_MOD, |
381 | OMAP3430_CM_SLEEPDEP); | 385 | CM_AUTOIDLE); |
382 | cm_write_mod_reg(cm_context.dss_cm_sleepdep, OMAP3430_DSS_MOD, | 386 | omap2_cm_write_mod_reg(cm_context.per_cm_autoidle, OMAP3430_PER_MOD, |
383 | OMAP3430_CM_SLEEPDEP); | 387 | CM_AUTOIDLE); |
384 | cm_write_mod_reg(cm_context.cam_cm_sleepdep, OMAP3430_CAM_MOD, | 388 | omap2_cm_write_mod_reg(cm_context.usbhost_cm_autoidle, |
385 | OMAP3430_CM_SLEEPDEP); | 389 | OMAP3430ES2_USBHOST_MOD, CM_AUTOIDLE); |
386 | cm_write_mod_reg(cm_context.per_cm_sleepdep, OMAP3430_PER_MOD, | 390 | omap2_cm_write_mod_reg(cm_context.sgx_cm_sleepdep, OMAP3430ES2_SGX_MOD, |
387 | OMAP3430_CM_SLEEPDEP); | 391 | OMAP3430_CM_SLEEPDEP); |
388 | cm_write_mod_reg(cm_context.usbhost_cm_sleepdep, | 392 | omap2_cm_write_mod_reg(cm_context.dss_cm_sleepdep, OMAP3430_DSS_MOD, |
389 | OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_SLEEPDEP); | 393 | OMAP3430_CM_SLEEPDEP); |
390 | cm_write_mod_reg(cm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD, | 394 | omap2_cm_write_mod_reg(cm_context.cam_cm_sleepdep, OMAP3430_CAM_MOD, |
391 | OMAP3_CM_CLKOUT_CTRL_OFFSET); | 395 | OMAP3430_CM_SLEEPDEP); |
396 | omap2_cm_write_mod_reg(cm_context.per_cm_sleepdep, OMAP3430_PER_MOD, | ||
397 | OMAP3430_CM_SLEEPDEP); | ||
398 | omap2_cm_write_mod_reg(cm_context.usbhost_cm_sleepdep, | ||
399 | OMAP3430ES2_USBHOST_MOD, OMAP3430_CM_SLEEPDEP); | ||
400 | omap2_cm_write_mod_reg(cm_context.cm_clkout_ctrl, OMAP3430_CCR_MOD, | ||
401 | OMAP3_CM_CLKOUT_CTRL_OFFSET); | ||
392 | } | 402 | } |
393 | #endif | 403 | #endif |