diff options
author | Abhijit Pagare <abhijitpagare@ti.com> | 2010-01-26 22:12:53 -0500 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2010-01-26 22:12:53 -0500 |
commit | 84c0c39aec31a09571fc08a752a2f4da0fe9fcf2 (patch) | |
tree | cae08d44938c6df7f7bc740d2feea26086a192f4 /arch/arm/mach-omap2/cm.h | |
parent | 3a759f09d7b9c6bbefffadd38fdc116125c49730 (diff) |
ARM: OMAP4: PM: Make OMAP3 Clock-domain framework compatible for OMAP4.
Here the ".clkstctrl_reg" field is added to the clockdomain stucture
as the module offsets for OMAP4 do not map one to one for powerdomains
and clockdomains as it used to for OMAP3. Hence we need to use absolute
addresses to access the control registers. Some of the clock domains have
modules falling in the address space of PRM partition. Hence necessitating
the use of absolute adresses.
Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/cm.h')
-rw-r--r-- | arch/arm/mach-omap2/cm.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h index 90a4086fbdf4..4e4ac8ccd7f5 100644 --- a/arch/arm/mach-omap2/cm.h +++ b/arch/arm/mach-omap2/cm.h | |||
@@ -67,7 +67,8 @@ | |||
67 | #define CM_CLKSEL 0x0040 | 67 | #define CM_CLKSEL 0x0040 |
68 | #define CM_CLKSEL1 CM_CLKSEL | 68 | #define CM_CLKSEL1 CM_CLKSEL |
69 | #define CM_CLKSEL2 0x0044 | 69 | #define CM_CLKSEL2 0x0044 |
70 | #define CM_CLKSTCTRL 0x0048 | 70 | #define OMAP2_CM_CLKSTCTRL 0x0048 |
71 | #define OMAP4_CM_CLKSTCTRL 0x0000 | ||
71 | 72 | ||
72 | 73 | ||
73 | /* Architecture-specific registers */ | 74 | /* Architecture-specific registers */ |
@@ -88,7 +89,7 @@ | |||
88 | #define OMAP3430_CM_CLKSEL1_PLL CM_CLKSEL | 89 | #define OMAP3430_CM_CLKSEL1_PLL CM_CLKSEL |
89 | #define OMAP3430_CM_CLKSEL2_PLL CM_CLKSEL2 | 90 | #define OMAP3430_CM_CLKSEL2_PLL CM_CLKSEL2 |
90 | #define OMAP3430_CM_SLEEPDEP CM_CLKSEL2 | 91 | #define OMAP3430_CM_SLEEPDEP CM_CLKSEL2 |
91 | #define OMAP3430_CM_CLKSEL3 CM_CLKSTCTRL | 92 | #define OMAP3430_CM_CLKSEL3 OMAP2_CM_CLKSTCTRL |
92 | #define OMAP3430_CM_CLKSTST 0x004c | 93 | #define OMAP3430_CM_CLKSTST 0x004c |
93 | #define OMAP3430ES2_CM_CLKSEL4 0x004c | 94 | #define OMAP3430ES2_CM_CLKSEL4 0x004c |
94 | #define OMAP3430ES2_CM_CLKSEL5 0x0050 | 95 | #define OMAP3430ES2_CM_CLKSEL5 0x0050 |