AM35xx: Add clock support for new modules on AM35xx

This patch adds clock support for the following AM35xx modules
	- Ethernet MAC
	- CAN Controller (HECC)
	- New MUSB OTG Controller with integrated Phy
	- Video Processing Front End (VPFE)
	- Additional UART (UART4)

Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

1 files changed, 10 insertions, 0 deletions

diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index d18da47e3f4b..c04c7c68f033 100644
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -168,6 +168,12 @@
 #define OMAP3430_EN_SDRC                                (1 << 1)
 #define OMAP3430_EN_SDRC_SHIFT                          1
 
+/* AM35XX specific CM_ICLKEN1_CORE bits */
+#define AM35XX_EN_IPSS_MASK                             (1 << 4)
+#define AM35XX_EN_IPSS_SHIFT                            4
+#define AM35XX_EN_UART4_MASK                    (1 << 23)
+#define AM35XX_EN_UART4_SHIFT                           23
+
 /* CM_ICLKEN2_CORE */
 #define OMAP3430_EN_PKA                                 (1 << 4)
 #define OMAP3430_EN_PKA_SHIFT                           4
@@ -220,6 +226,10 @@
 #define OMAP3430_ST_SSI_STDBY_SHIFT                     0
 #define OMAP3430_ST_SSI_STDBY_MASK                      (1 << 0)
 
+/* AM35xx specific CM_IDLEST1_CORE bits */
+#define AM35XX_ST_IPSS_SHIFT                            5
+#define AM35XX_ST_IPSS_MASK                             (1 << 5)
+
 /* CM_IDLEST2_CORE */
 #define OMAP3430_ST_PKA_SHIFT                           4
 #define OMAP3430_ST_PKA_MASK                            (1 << 4)