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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-10-14 17:24:42 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-10-14 17:24:42 -0400
commitb6825d2df55aa7d7341c715b577b73a6a03dc944 (patch)
treeae4f0f52f4c2ad4e501dd323318486ccdd7fcd93 /arch/arm/mach-omap2/cm-regbits-24xx.h
parent6defd90433729c2d795865165cb34d938d8ff07c (diff)
parentaa59e19d05114f9fb7718d6bc8398255476fb4f5 (diff)
Merge branch 'omap-all' into devel
Conflicts: arch/arm/mach-omap2/gpmc.c arch/arm/mach-omap2/irq.c
Diffstat (limited to 'arch/arm/mach-omap2/cm-regbits-24xx.h')
-rw-r--r--arch/arm/mach-omap2/cm-regbits-24xx.h24
1 files changed, 16 insertions, 8 deletions
diff --git a/arch/arm/mach-omap2/cm-regbits-24xx.h b/arch/arm/mach-omap2/cm-regbits-24xx.h
index 20ac38100678..1098ecfab861 100644
--- a/arch/arm/mach-omap2/cm-regbits-24xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-24xx.h
@@ -63,7 +63,8 @@
63#define OMAP24XX_CLKSEL_MPU_MASK (0x1f << 0) 63#define OMAP24XX_CLKSEL_MPU_MASK (0x1f << 0)
64 64
65/* CM_CLKSTCTRL_MPU */ 65/* CM_CLKSTCTRL_MPU */
66#define OMAP24XX_AUTOSTATE_MPU (1 << 0) 66#define OMAP24XX_AUTOSTATE_MPU_SHIFT 0
67#define OMAP24XX_AUTOSTATE_MPU_MASK (1 << 0)
67 68
68/* CM_FCLKEN1_CORE specific bits*/ 69/* CM_FCLKEN1_CORE specific bits*/
69#define OMAP24XX_EN_TV_SHIFT 2 70#define OMAP24XX_EN_TV_SHIFT 2
@@ -238,9 +239,12 @@
238#define OMAP24XX_CLKSEL_GPT2_MASK (0x3 << 2) 239#define OMAP24XX_CLKSEL_GPT2_MASK (0x3 << 2)
239 240
240/* CM_CLKSTCTRL_CORE */ 241/* CM_CLKSTCTRL_CORE */
241#define OMAP24XX_AUTOSTATE_DSS (1 << 2) 242#define OMAP24XX_AUTOSTATE_DSS_SHIFT 2
242#define OMAP24XX_AUTOSTATE_L4 (1 << 1) 243#define OMAP24XX_AUTOSTATE_DSS_MASK (1 << 2)
243#define OMAP24XX_AUTOSTATE_L3 (1 << 0) 244#define OMAP24XX_AUTOSTATE_L4_SHIFT 1
245#define OMAP24XX_AUTOSTATE_L4_MASK (1 << 1)
246#define OMAP24XX_AUTOSTATE_L3_SHIFT 0
247#define OMAP24XX_AUTOSTATE_L3_MASK (1 << 0)
244 248
245/* CM_FCLKEN_GFX */ 249/* CM_FCLKEN_GFX */
246#define OMAP24XX_EN_3D_SHIFT 2 250#define OMAP24XX_EN_3D_SHIFT 2
@@ -255,7 +259,8 @@
255/* CM_CLKSEL_GFX specific bits */ 259/* CM_CLKSEL_GFX specific bits */
256 260
257/* CM_CLKSTCTRL_GFX */ 261/* CM_CLKSTCTRL_GFX */
258#define OMAP24XX_AUTOSTATE_GFX (1 << 0) 262#define OMAP24XX_AUTOSTATE_GFX_SHIFT 0
263#define OMAP24XX_AUTOSTATE_GFX_MASK (1 << 0)
259 264
260/* CM_FCLKEN_WKUP specific bits */ 265/* CM_FCLKEN_WKUP specific bits */
261 266
@@ -367,8 +372,10 @@
367#define OMAP24XX_CLKSEL_DSP_MASK (0x1f << 0) 372#define OMAP24XX_CLKSEL_DSP_MASK (0x1f << 0)
368 373
369/* CM_CLKSTCTRL_DSP */ 374/* CM_CLKSTCTRL_DSP */
370#define OMAP2420_AUTOSTATE_IVA (1 << 8) 375#define OMAP2420_AUTOSTATE_IVA_SHIFT 8
371#define OMAP24XX_AUTOSTATE_DSP (1 << 0) 376#define OMAP2420_AUTOSTATE_IVA_MASK (1 << 8)
377#define OMAP24XX_AUTOSTATE_DSP_SHIFT 0
378#define OMAP24XX_AUTOSTATE_DSP_MASK (1 << 0)
372 379
373/* CM_FCLKEN_MDM */ 380/* CM_FCLKEN_MDM */
374/* 2430 only */ 381/* 2430 only */
@@ -396,6 +403,7 @@
396 403
397/* CM_CLKSTCTRL_MDM */ 404/* CM_CLKSTCTRL_MDM */
398/* 2430 only */ 405/* 2430 only */
399#define OMAP2430_AUTOSTATE_MDM (1 << 0) 406#define OMAP2430_AUTOSTATE_MDM_SHIFT 0
407#define OMAP2430_AUTOSTATE_MDM_MASK (1 << 0)
400 408
401#endif 409#endif