aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/clockdomains44xx_data.c
diff options
context:
space:
mode:
authorPaul Walmsley <paul@pwsan.com>2010-12-21 22:01:20 -0500
committerPaul Walmsley <paul@pwsan.com>2010-12-21 22:01:20 -0500
commitdc0b3a701499bb7727314d7a9c764f7486db4802 (patch)
treed2daec5610919039b98909d1983e479df4bf1842 /arch/arm/mach-omap2/clockdomains44xx_data.c
parent6e01478ae8a4322c9a2b2d6efed50196265ed5f2 (diff)
OMAP2+: clockdomains: move clockdomain static data to .c files
Static data should be declared in .c files, not .h files. It should be possible to #include .h files at any point without creating multiple copies of the same data. We converted the clock data to .c files some time ago. This patch does the same for the clockdomain data. Signed-off-by: Paul Walmsley <paul@pwsan.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Kevin Hilman <khilman@deeprootsystems.com> Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: Rajendra Nayak <rnayak@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/clockdomains44xx_data.c')
-rw-r--r--arch/arm/mach-omap2/clockdomains44xx_data.c282
1 files changed, 282 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
new file mode 100644
index 000000000000..c847a8bad28e
--- /dev/null
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -0,0 +1,282 @@
1/*
2 * OMAP4 Clock domains framework
3 *
4 * Copyright (C) 2009 Texas Instruments, Inc.
5 * Copyright (C) 2009 Nokia Corporation
6 *
7 * Abhijit Pagare (abhijitpagare@ti.com)
8 * Benoit Cousson (b-cousson@ti.com)
9 *
10 * This file is automatically generated from the OMAP hardware databases.
11 * We respectfully ask that any modifications to this file be coordinated
12 * with the public linux-omap@vger.kernel.org mailing list and the
13 * authors above to ensure that the autogeneration scripts are kept
14 * up-to-date with the file contents.
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2 as
18 * published by the Free Software Foundation.
19 */
20
21/*
22 * To-Do List
23 * -> Populate the Sleep/Wakeup dependencies for the domains
24 */
25
26#include <linux/kernel.h>
27#include <linux/io.h>
28
29#include <plat/clockdomain.h>
30
31#include "cm44xx.h"
32#include "prm44xx.h"
33#include "cm-regbits-44xx.h"
34#include "prm-regbits-44xx.h"
35
36static struct clockdomain l4_cefuse_44xx_clkdm = {
37 .name = "l4_cefuse_clkdm",
38 .pwrdm = { .name = "cefuse_pwrdm" },
39 .clkstctrl_reg = OMAP4430_CM_CEFUSE_CLKSTCTRL,
40 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
41 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
42 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
43};
44
45static struct clockdomain l4_cfg_44xx_clkdm = {
46 .name = "l4_cfg_clkdm",
47 .pwrdm = { .name = "core_pwrdm" },
48 .clkstctrl_reg = OMAP4430_CM_L4CFG_CLKSTCTRL,
49 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
50 .flags = CLKDM_CAN_HWSUP,
51 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
52};
53
54static struct clockdomain tesla_44xx_clkdm = {
55 .name = "tesla_clkdm",
56 .pwrdm = { .name = "tesla_pwrdm" },
57 .clkstctrl_reg = OMAP4430_CM_TESLA_CLKSTCTRL,
58 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
59 .flags = CLKDM_CAN_HWSUP_SWSUP,
60 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
61};
62
63static struct clockdomain l3_gfx_44xx_clkdm = {
64 .name = "l3_gfx_clkdm",
65 .pwrdm = { .name = "gfx_pwrdm" },
66 .clkstctrl_reg = OMAP4430_CM_GFX_CLKSTCTRL,
67 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
68 .flags = CLKDM_CAN_HWSUP_SWSUP,
69 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
70};
71
72static struct clockdomain ivahd_44xx_clkdm = {
73 .name = "ivahd_clkdm",
74 .pwrdm = { .name = "ivahd_pwrdm" },
75 .clkstctrl_reg = OMAP4430_CM_IVAHD_CLKSTCTRL,
76 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
77 .flags = CLKDM_CAN_HWSUP_SWSUP,
78 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
79};
80
81static struct clockdomain l4_secure_44xx_clkdm = {
82 .name = "l4_secure_clkdm",
83 .pwrdm = { .name = "l4per_pwrdm" },
84 .clkstctrl_reg = OMAP4430_CM_L4SEC_CLKSTCTRL,
85 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
86 .flags = CLKDM_CAN_HWSUP_SWSUP,
87 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
88};
89
90static struct clockdomain l4_per_44xx_clkdm = {
91 .name = "l4_per_clkdm",
92 .pwrdm = { .name = "l4per_pwrdm" },
93 .clkstctrl_reg = OMAP4430_CM_L4PER_CLKSTCTRL,
94 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
95 .flags = CLKDM_CAN_HWSUP_SWSUP,
96 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
97};
98
99static struct clockdomain abe_44xx_clkdm = {
100 .name = "abe_clkdm",
101 .pwrdm = { .name = "abe_pwrdm" },
102 .clkstctrl_reg = OMAP4430_CM1_ABE_CLKSTCTRL,
103 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
104 .flags = CLKDM_CAN_HWSUP_SWSUP,
105 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
106};
107
108static struct clockdomain l3_instr_44xx_clkdm = {
109 .name = "l3_instr_clkdm",
110 .pwrdm = { .name = "core_pwrdm" },
111 .clkstctrl_reg = OMAP4430_CM_L3INSTR_CLKSTCTRL,
112 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
113 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
114};
115
116static struct clockdomain l3_init_44xx_clkdm = {
117 .name = "l3_init_clkdm",
118 .pwrdm = { .name = "l3init_pwrdm" },
119 .clkstctrl_reg = OMAP4430_CM_L3INIT_CLKSTCTRL,
120 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
121 .flags = CLKDM_CAN_HWSUP_SWSUP,
122 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
123};
124
125static struct clockdomain mpuss_44xx_clkdm = {
126 .name = "mpuss_clkdm",
127 .pwrdm = { .name = "mpu_pwrdm" },
128 .clkstctrl_reg = OMAP4430_CM_MPU_CLKSTCTRL,
129 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
130 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
131 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
132};
133
134static struct clockdomain mpu0_44xx_clkdm = {
135 .name = "mpu0_clkdm",
136 .pwrdm = { .name = "cpu0_pwrdm" },
137 .clkstctrl_reg = OMAP4430_CM_CPU0_CLKSTCTRL,
138 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
139 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
140 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
141};
142
143static struct clockdomain mpu1_44xx_clkdm = {
144 .name = "mpu1_clkdm",
145 .pwrdm = { .name = "cpu1_pwrdm" },
146 .clkstctrl_reg = OMAP4430_CM_CPU1_CLKSTCTRL,
147 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
148 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
149 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
150};
151
152static struct clockdomain l3_emif_44xx_clkdm = {
153 .name = "l3_emif_clkdm",
154 .pwrdm = { .name = "core_pwrdm" },
155 .clkstctrl_reg = OMAP4430_CM_MEMIF_CLKSTCTRL,
156 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
157 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
158 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
159};
160
161static struct clockdomain l4_ao_44xx_clkdm = {
162 .name = "l4_ao_clkdm",
163 .pwrdm = { .name = "always_on_core_pwrdm" },
164 .clkstctrl_reg = OMAP4430_CM_ALWON_CLKSTCTRL,
165 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
166 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
167 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
168};
169
170static struct clockdomain ducati_44xx_clkdm = {
171 .name = "ducati_clkdm",
172 .pwrdm = { .name = "core_pwrdm" },
173 .clkstctrl_reg = OMAP4430_CM_DUCATI_CLKSTCTRL,
174 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
175 .flags = CLKDM_CAN_HWSUP_SWSUP,
176 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
177};
178
179static struct clockdomain l3_2_44xx_clkdm = {
180 .name = "l3_2_clkdm",
181 .pwrdm = { .name = "core_pwrdm" },
182 .clkstctrl_reg = OMAP4430_CM_L3_2_CLKSTCTRL,
183 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
184 .flags = CLKDM_CAN_HWSUP,
185 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
186};
187
188static struct clockdomain l3_1_44xx_clkdm = {
189 .name = "l3_1_clkdm",
190 .pwrdm = { .name = "core_pwrdm" },
191 .clkstctrl_reg = OMAP4430_CM_L3_1_CLKSTCTRL,
192 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
193 .flags = CLKDM_CAN_HWSUP,
194 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
195};
196
197static struct clockdomain l3_d2d_44xx_clkdm = {
198 .name = "l3_d2d_clkdm",
199 .pwrdm = { .name = "core_pwrdm" },
200 .clkstctrl_reg = OMAP4430_CM_D2D_CLKSTCTRL,
201 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
202 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
203 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
204};
205
206static struct clockdomain iss_44xx_clkdm = {
207 .name = "iss_clkdm",
208 .pwrdm = { .name = "cam_pwrdm" },
209 .clkstctrl_reg = OMAP4430_CM_CAM_CLKSTCTRL,
210 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
211 .flags = CLKDM_CAN_HWSUP_SWSUP,
212 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
213};
214
215static struct clockdomain l3_dss_44xx_clkdm = {
216 .name = "l3_dss_clkdm",
217 .pwrdm = { .name = "dss_pwrdm" },
218 .clkstctrl_reg = OMAP4430_CM_DSS_CLKSTCTRL,
219 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
220 .flags = CLKDM_CAN_HWSUP_SWSUP,
221 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
222};
223
224static struct clockdomain l4_wkup_44xx_clkdm = {
225 .name = "l4_wkup_clkdm",
226 .pwrdm = { .name = "wkup_pwrdm" },
227 .clkstctrl_reg = OMAP4430_CM_WKUP_CLKSTCTRL,
228 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
229 .flags = CLKDM_CAN_HWSUP,
230 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
231};
232
233static struct clockdomain emu_sys_44xx_clkdm = {
234 .name = "emu_sys_clkdm",
235 .pwrdm = { .name = "emu_pwrdm" },
236 .clkstctrl_reg = OMAP4430_CM_EMU_CLKSTCTRL,
237 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
238 .flags = CLKDM_CAN_HWSUP,
239 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
240};
241
242static struct clockdomain l3_dma_44xx_clkdm = {
243 .name = "l3_dma_clkdm",
244 .pwrdm = { .name = "core_pwrdm" },
245 .clkstctrl_reg = OMAP4430_CM_SDMA_CLKSTCTRL,
246 .clktrctrl_mask = OMAP4430_CLKTRCTRL_MASK,
247 .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
248 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
249};
250
251static struct clockdomain *clockdomains_omap44xx[] __initdata = {
252 &l4_cefuse_44xx_clkdm,
253 &l4_cfg_44xx_clkdm,
254 &tesla_44xx_clkdm,
255 &l3_gfx_44xx_clkdm,
256 &ivahd_44xx_clkdm,
257 &l4_secure_44xx_clkdm,
258 &l4_per_44xx_clkdm,
259 &abe_44xx_clkdm,
260 &l3_instr_44xx_clkdm,
261 &l3_init_44xx_clkdm,
262 &mpuss_44xx_clkdm,
263 &mpu0_44xx_clkdm,
264 &mpu1_44xx_clkdm,
265 &l3_emif_44xx_clkdm,
266 &l4_ao_44xx_clkdm,
267 &ducati_44xx_clkdm,
268 &l3_2_44xx_clkdm,
269 &l3_1_44xx_clkdm,
270 &l3_d2d_44xx_clkdm,
271 &iss_44xx_clkdm,
272 &l3_dss_44xx_clkdm,
273 &l4_wkup_44xx_clkdm,
274 &emu_sys_44xx_clkdm,
275 &l3_dma_44xx_clkdm,
276 NULL,
277};
278
279void __init omap44xx_clockdomains_init(void)
280{
281 clkdm_init(clockdomains_omap44xx, NULL);
282}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-23 07:49:26 -0500