ARM: OMAP4: PM: Make OMAP3 Clock-domain framework compatible for OMAP4.

Here the ".clkstctrl_reg" field is added to the clockdomain stucture
as the module offsets for OMAP4 do not map one to one for powerdomains
and clockdomains as it used to for OMAP3. Hence we need to use absolute
addresses to access the control registers. Some of the clock domains have
modules falling in the address space of PRM partition. Hence  necessitating
the use of absolute adresses.

Signed-off-by: Abhijit Pagare <abhijitpagare@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>

1 files changed, 7 insertions, 5 deletions

diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 50c8cd7c7126..52885ac5bb5d 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -163,7 +163,7 @@ static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable)
 
         cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask,
                             v << __ffs(clkdm->clktrctrl_mask),
-                            clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
+                            clkdm->pwrdm.ptr->prcm_offs, OMAP2_CM_CLKSTCTRL);
 }
 
 static struct clockdomain *_clkdm_lookup(const char *name)
@@ -371,7 +371,7 @@ struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm)
  * @clk: struct clk * of a clockdomain
  *
  * Return the clockdomain's current state transition mode from the
- * corresponding domain CM_CLKSTCTRL register.  Returns -EINVAL if clk
+ * corresponding domain OMAP2_CM_CLKSTCTRL register.    Returns -EINVAL if clk
  * is NULL or the current mode upon success.
  */
 static int omap2_clkdm_clktrctrl_read(struct clockdomain *clkdm)
@@ -381,7 +381,7 @@ static int omap2_clkdm_clktrctrl_read(struct clockdomain *clkdm)
         if (!clkdm)
                 return -EINVAL;
 
-        v = cm_read_mod_reg(clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
+        v = cm_read_mod_reg(clkdm->pwrdm.ptr->prcm_offs, OMAP2_CM_CLKSTCTRL);
         v &= clkdm->clktrctrl_mask;
         v >>= __ffs(clkdm->clktrctrl_mask);
 
@@ -421,7 +421,8 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm)
                          __ffs(clkdm->clktrctrl_mask));
 
                 cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v,
-                                    clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
+                                    clkdm->pwrdm.ptr->prcm_offs,
+                                                         OMAP2_CM_CLKSTCTRL);
 
         } else {
                 BUG();
@@ -463,7 +464,8 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
                          __ffs(clkdm->clktrctrl_mask));
 
                 cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v,
-                                    clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL);
+                                    clkdm->pwrdm.ptr->prcm_offs,
+                                                 OMAP2_CM_CLKSTCTRL);
 
         } else {
                 BUG();