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authorSumit Semwal <sumit.semwal@ti.com>2011-01-31 11:27:43 -0500
committerTomi Valkeinen <tomi.valkeinen@ti.com>2011-03-11 08:46:22 -0500
commit872462cdfc74e7b93c09870128d9bb436d4e9804 (patch)
tree3334df4774a219b79ae9422c50ea5e2d4be9894c /arch/arm/mach-omap2/clock44xx_data.c
parentef631f82500390b3dfc20b16214e53c443d675a4 (diff)
OMAP2PLUS: clocks: Align DSS clock names and roles
Currently, clock database has <dev, clock-name> tuples for DSS2. Because of this, the clock names are different across different OMAP platforms. This patch aligns the DSS2 clock names and roles across OMAP 2420, 2430, 3xxx, 44xx platforms in the clock databases, hwmod databases for opt-clocks, and DSS clock handling. This ensures that clk_get/put/enable/disable APIs in DSS can use uniform role names. Signed-off-by: Sumit Semwal <sumit.semwal@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock44xx_data.c')
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index fdbc0426b6f4..6ba69b1158e6 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3106,11 +3106,11 @@ static struct omap_clk omap44xx_clks[] = {
3106 CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), 3106 CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X),
3107 CLK(NULL, "dmic_fck", &dmic_fck, CK_443X), 3107 CLK(NULL, "dmic_fck", &dmic_fck, CK_443X),
3108 CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), 3108 CLK(NULL, "dsp_fck", &dsp_fck, CK_443X),
3109 CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X), 3109 CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X),
3110 CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X), 3110 CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X),
3111 CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_443X), 3111 CLK("omapdss_dss", "dss_clk", &dss_dss_clk, CK_443X),
3112 CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X), 3112 CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X),
3113 CLK(NULL, "dss_fck", &dss_fck, CK_443X), 3113 CLK("omapdss_dss", "fck", &dss_fck, CK_443X),
3114 CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), 3114 CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X),
3115 CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), 3115 CLK(NULL, "emif1_fck", &emif1_fck, CK_443X),
3116 CLK(NULL, "emif2_fck", &emif2_fck, CK_443X), 3116 CLK(NULL, "emif2_fck", &emif2_fck, CK_443X),