diff options
author | Rajendra Nayak <rnayak@ti.com> | 2009-12-08 20:46:28 -0500 |
---|---|---|
committer | paul <paul@twilight.(none)> | 2009-12-11 19:00:45 -0500 |
commit | 972c542746904b5f418284946728a61b783275ef (patch) | |
tree | 3f8b449c10e6a25df3bd216c6e039f4240d52446 /arch/arm/mach-omap2/clock44xx.h | |
parent | dd7084138f7293f97584050d43a92cb03836974e (diff) |
ARM: OMAP4: PM: OMAP4 clock tree and clkdev registration
This patch defines all the clock nodes in OMAP4430
platform. All the clock node structs and the clkdev table is
autogenerated using a python script (gen_clock_tree.py)
developed by Paul Walmsley, Benoit Cousson and Rajendra Nayak.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock44xx.h')
-rw-r--r-- | arch/arm/mach-omap2/clock44xx.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clock44xx.h b/arch/arm/mach-omap2/clock44xx.h new file mode 100644 index 000000000000..c1bc4b6eb6b3 --- /dev/null +++ b/arch/arm/mach-omap2/clock44xx.h | |||
@@ -0,0 +1,23 @@ | |||
1 | /* | ||
2 | * OMAP4 clock function prototypes and macros | ||
3 | * | ||
4 | * Copyright (C) 2009 Texas Instruments, Inc. | ||
5 | */ | ||
6 | |||
7 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_44XX_H | ||
8 | #define __ARCH_ARM_MACH_OMAP2_CLOCK_44XX_H | ||
9 | |||
10 | unsigned long omap3_dpll_recalc(struct clk *clk); | ||
11 | unsigned long omap3_clkoutx2_recalc(struct clk *clk); | ||
12 | int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate); | ||
13 | |||
14 | /* DPLL modes */ | ||
15 | #define DPLL_LOW_POWER_STOP 0x1 | ||
16 | #define DPLL_LOW_POWER_BYPASS 0x5 | ||
17 | #define DPLL_LOCKED 0x7 | ||
18 | #define OMAP4430_MAX_DPLL_MULT 2048 | ||
19 | #define OMAP4430_MAX_DPLL_DIV 128 | ||
20 | |||
21 | extern const struct clkops clkops_noncore_dpll_ops; | ||
22 | |||
23 | #endif | ||