aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/clock3xxx_data.c
diff options
context:
space:
mode:
authorstanley.miao <stanley.miao@windriver.com>2010-08-16 02:21:19 -0400
committerTony Lindgren <tony@atomide.com>2010-08-16 02:21:19 -0400
commit8098bb0d8c7fe4ace7d13274c85a149503eee114 (patch)
tree3d350f5cdb8c6abddfacb9584caafcee2c8694f3 /arch/arm/mach-omap2/clock3xxx_data.c
parent77c0870ca515667b77750b397008d68a17fad9d8 (diff)
OMAP3: Fix a cpu type check problem
cpu_is_omap3517() and cpu_is_omap3505() are the subgroups of cpu_is_omap34xx(), so we should check cpu_is_omap3517() and cpu_is_omap3505() first, then check cpu_is_omap34xx(). Otherwise, All AM35XX (Sitara) clocks do not get registered and device drivers (ti_hecc, etc...) that depend on those clocks are failing to get the clock and end up with non working device. Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock3xxx_data.c')
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 138646deac89..dfdce2d82779 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3417,7 +3417,13 @@ int __init omap3xxx_clk_init(void)
3417 struct omap_clk *c; 3417 struct omap_clk *c;
3418 u32 cpu_clkflg = CK_3XXX; 3418 u32 cpu_clkflg = CK_3XXX;
3419 3419
3420 if (cpu_is_omap34xx()) { 3420 if (cpu_is_omap3517()) {
3421 cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
3422 cpu_clkflg |= CK_3517;
3423 } else if (cpu_is_omap3505()) {
3424 cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
3425 cpu_clkflg |= CK_3505;
3426 } else if (cpu_is_omap34xx()) {
3421 cpu_mask = RATE_IN_3XXX; 3427 cpu_mask = RATE_IN_3XXX;
3422 cpu_clkflg |= CK_343X; 3428 cpu_clkflg |= CK_343X;
3423 3429
@@ -3432,12 +3438,6 @@ int __init omap3xxx_clk_init(void)
3432 cpu_mask |= RATE_IN_3430ES2PLUS; 3438 cpu_mask |= RATE_IN_3430ES2PLUS;
3433 cpu_clkflg |= CK_3430ES2; 3439 cpu_clkflg |= CK_3430ES2;
3434 } 3440 }
3435 } else if (cpu_is_omap3517()) {
3436 cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
3437 cpu_clkflg |= CK_3517;
3438 } else if (cpu_is_omap3505()) {
3439 cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS;
3440 cpu_clkflg |= CK_3505;
3441 } 3441 }
3442 3442
3443 if (omap3_has_192mhz_clk()) 3443 if (omap3_has_192mhz_clk())