aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/clock3xxx_data.c
diff options
context:
space:
mode:
authorBenoit Cousson <b-cousson@ti.com>2011-07-10 07:54:12 -0400
committerPaul Walmsley <paul@pwsan.com>2011-07-10 07:54:12 -0400
commitbf1e0776cf5e4ef2622de3a4b63f84175b5b48ab (patch)
treedf9b0b1c02f1f7c4774464bf5ca58d6ca791db9b /arch/arm/mach-omap2/clock3xxx_data.c
parentc84584139aaeef7631df152e13cbf319d8e55950 (diff)
OMAP: omap_device: Create clkdev entry for hwmod main_clk
Extend the existing function to create clkdev for every optional clocks to add a well one "fck" alias for the main_clk of the omap_hwmod. It will allow to remove these static clkdev entries from the clockXXX_data.c file. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Cc: Todd Poynor <toddpoynor@google.com> [paul@pwsan.com: remove all of the "fck" role clkdev aliases from the clock data files; fixed error message] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock3xxx_data.c')
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c44
1 files changed, 22 insertions, 22 deletions
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 75b119bd9cda..ffd55b1c4396 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3289,25 +3289,25 @@ static struct omap_clk omap3xxx_clks[] = {
3289 CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX), 3289 CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX),
3290 CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX), 3290 CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX),
3291 CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), 3291 CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX),
3292 CLK("omap_hsmmc.2", "fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3292 CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3293 CLK("omap_hsmmc.1", "fck", &mmchs2_fck, CK_3XXX), 3293 CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX),
3294 CLK(NULL, "mspro_fck", &mspro_fck, CK_34XX | CK_36XX), 3294 CLK(NULL, "mspro_fck", &mspro_fck, CK_34XX | CK_36XX),
3295 CLK("omap_hsmmc.0", "fck", &mmchs1_fck, CK_3XXX), 3295 CLK(NULL, "mmchs1_fck", &mmchs1_fck, CK_3XXX),
3296 CLK("omap_i2c.3", "fck", &i2c3_fck, CK_3XXX), 3296 CLK(NULL, "i2c3_fck", &i2c3_fck, CK_3XXX),
3297 CLK("omap_i2c.2", "fck", &i2c2_fck, CK_3XXX), 3297 CLK(NULL, "i2c2_fck", &i2c2_fck, CK_3XXX),
3298 CLK("omap_i2c.1", "fck", &i2c1_fck, CK_3XXX), 3298 CLK(NULL, "i2c1_fck", &i2c1_fck, CK_3XXX),
3299 CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_3XXX), 3299 CLK(NULL, "mcbsp5_fck", &mcbsp5_fck, CK_3XXX),
3300 CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_3XXX), 3300 CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_3XXX),
3301 CLK(NULL, "core_48m_fck", &core_48m_fck, CK_3XXX), 3301 CLK(NULL, "core_48m_fck", &core_48m_fck, CK_3XXX),
3302 CLK("omap2_mcspi.4", "fck", &mcspi4_fck, CK_3XXX), 3302 CLK(NULL, "mcspi4_fck", &mcspi4_fck, CK_3XXX),
3303 CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_3XXX), 3303 CLK(NULL, "mcspi3_fck", &mcspi3_fck, CK_3XXX),
3304 CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_3XXX), 3304 CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_3XXX),
3305 CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_3XXX), 3305 CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_3XXX),
3306 CLK(NULL, "uart2_fck", &uart2_fck, CK_3XXX), 3306 CLK(NULL, "uart2_fck", &uart2_fck, CK_3XXX),
3307 CLK(NULL, "uart1_fck", &uart1_fck, CK_3XXX), 3307 CLK(NULL, "uart1_fck", &uart1_fck, CK_3XXX),
3308 CLK(NULL, "fshostusb_fck", &fshostusb_fck, CK_3430ES1), 3308 CLK(NULL, "fshostusb_fck", &fshostusb_fck, CK_3430ES1),
3309 CLK(NULL, "core_12m_fck", &core_12m_fck, CK_3XXX), 3309 CLK(NULL, "core_12m_fck", &core_12m_fck, CK_3XXX),
3310 CLK("omap_hdq.0", "fck", &hdq_fck, CK_3XXX), 3310 CLK("omap_hdq.0", "fck", &hdq_fck, CK_3XXX),
3311 CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es1, CK_3430ES1), 3311 CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es1, CK_3430ES1),
3312 CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es2, CK_3430ES2PLUS | CK_36XX), 3312 CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es2, CK_3430ES2PLUS | CK_36XX),
3313 CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es1, CK_3430ES1), 3313 CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es1, CK_3430ES1),
@@ -3356,11 +3356,11 @@ static struct omap_clk omap3xxx_clks[] = {
3356 CLK("omap_rng", "ick", &rng_ick, CK_34XX | CK_36XX), 3356 CLK("omap_rng", "ick", &rng_ick, CK_34XX | CK_36XX),
3357 CLK(NULL, "sha11_ick", &sha11_ick, CK_34XX | CK_36XX), 3357 CLK(NULL, "sha11_ick", &sha11_ick, CK_34XX | CK_36XX),
3358 CLK(NULL, "des1_ick", &des1_ick, CK_34XX | CK_36XX), 3358 CLK(NULL, "des1_ick", &des1_ick, CK_34XX | CK_36XX),
3359 CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es1, CK_3430ES1), 3359 CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck_3430es1, CK_3430ES1),
3360 CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3360 CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3361 CLK("omapdss_dss", "tv_clk", &dss_tv_fck, CK_3XXX), 3361 CLK(NULL, "dss_tv_fck", &dss_tv_fck, CK_3XXX),
3362 CLK("omapdss_dss", "video_clk", &dss_96m_fck, CK_3XXX), 3362 CLK(NULL, "dss_96m_fck", &dss_96m_fck, CK_3XXX),
3363 CLK("omapdss_dss", "sys_clk", &dss2_alwon_fck, CK_3XXX), 3363 CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck, CK_3XXX),
3364 CLK("omapdss_dss", "ick", &dss_ick_3430es1, CK_3430ES1), 3364 CLK("omapdss_dss", "ick", &dss_ick_3430es1, CK_3430ES1),
3365 CLK("omapdss_dss", "ick", &dss_ick_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3365 CLK("omapdss_dss", "ick", &dss_ick_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3366 CLK(NULL, "cam_mclk", &cam_mclk, CK_34XX | CK_36XX), 3366 CLK(NULL, "cam_mclk", &cam_mclk, CK_34XX | CK_36XX),
@@ -3385,7 +3385,7 @@ static struct omap_clk omap3xxx_clks[] = {
3385 CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX), 3385 CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX),
3386 CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX), 3386 CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX),
3387 CLK(NULL, "gpio1_dbck", &gpio1_dbck, CK_3XXX), 3387 CLK(NULL, "gpio1_dbck", &gpio1_dbck, CK_3XXX),
3388 CLK("omap_wdt", "fck", &wdt2_fck, CK_3XXX), 3388 CLK(NULL, "wdt2_fck", &wdt2_fck, CK_3XXX),
3389 CLK(NULL, "wkup_l4_ick", &wkup_l4_ick, CK_34XX | CK_36XX), 3389 CLK(NULL, "wkup_l4_ick", &wkup_l4_ick, CK_34XX | CK_36XX),
3390 CLK(NULL, "usim_ick", &usim_ick, CK_3430ES2PLUS | CK_36XX), 3390 CLK(NULL, "usim_ick", &usim_ick, CK_3430ES2PLUS | CK_36XX),
3391 CLK("omap_wdt", "ick", &wdt2_ick, CK_3XXX), 3391 CLK("omap_wdt", "ick", &wdt2_ick, CK_3XXX),
@@ -3436,9 +3436,9 @@ static struct omap_clk omap3xxx_clks[] = {
3436 CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_3XXX), 3436 CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_3XXX),
3437 CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_3XXX), 3437 CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_3XXX),
3438 CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_3XXX), 3438 CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_3XXX),
3439 CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_3XXX), 3439 CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_3XXX),
3440 CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_3XXX), 3440 CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_3XXX),
3441 CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_3XXX), 3441 CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_3XXX),
3442 CLK("etb", "emu_src_ck", &emu_src_ck, CK_3XXX), 3442 CLK("etb", "emu_src_ck", &emu_src_ck, CK_3XXX),
3443 CLK(NULL, "pclk_fck", &pclk_fck, CK_3XXX), 3443 CLK(NULL, "pclk_fck", &pclk_fck, CK_3XXX),
3444 CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_3XXX), 3444 CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_3XXX),