ARM: OMAP3: clock: Cleanup !CONFIG_COMMON_CLK parts

Clean all #ifdef's added to OMAP3 clock code to make it COMMON clk
ready, not that CONFIG_COMMON_CLK is enabled.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Mike Turquette <mturquette@ti.com>
[paul@pwsan.com: remove some ifdefs in mach-omap2/io.c]
Signed-off-by: Paul Walmsley <paul@pwsan.com>

1 files changed, 0 insertions, 8 deletions

diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c
index a6f75cd85327..4eacab8f1176 100644
--- a/arch/arm/mach-omap2/clock3xxx.c
+++ b/arch/arm/mach-omap2/clock3xxx.c
@@ -38,12 +38,8 @@
 
 /* needed by omap3_core_dpll_m2_set_rate() */
 struct clk *sdrc_ick_p, *arm_fck_p;
-#ifdef CONFIG_COMMON_CLK
 int omap3_dpll4_set_rate(struct clk_hw *hw, unsigned long rate,
                                 unsigned long parent_rate)
-#else
-int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate)
-#endif
 {
         /*
          * According to the 12-5 CDP code from TI, "Limitation 2.5"
@@ -55,11 +51,7 @@ int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate)
                 return -EINVAL;
         }
 
-#ifdef CONFIG_COMMON_CLK
         return omap3_noncore_dpll_set_rate(hw, rate, parent_rate);
-#else
-        return omap3_noncore_dpll_set_rate(clk, rate);
-#endif
 }
 
 void __init omap3_clk_lock_dpll5(void)