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authorRanjith Lohithakshan <ranjithl@ti.com>2010-01-26 22:12:57 -0500
committerPaul Walmsley <paul@pwsan.com>2010-01-26 22:12:57 -0500
commitced825293ac34d4f250775c40f13cc6330653309 (patch)
tree7edfac9596d30cd1530cdca00069a32c1e34ee72 /arch/arm/mach-omap2/clock34xx_data.c
parent2c8a177eba6762ca828738c92efcdaed02d198bc (diff)
AM35xx: Clock table updates for AM3505/17
AM3505/17 though a OMAP3530 derivative have the following main differences - Removal of the following OMAP3 modules - IVA - ISP/CAM - Modem and D2D components (MAD2D, SAD2D) - USIM - SSI - Mailboxes - USB OTG - ICR - MSPRO - SmartReflex - SDRC replaced with EMIF4 Controller in the SDRC subsystem thus adding support for DDR2 memory devices - Addition of the following new modules - Ethernet MAC (CPGMAC) - CAN Controller (HECC) - New USB OTG Controller with integrated Phy - Video Processing Front End (VPFE) - Additional UART (UART4) - All security accelerators disabled on GP devices and not to be accessed or configured This patch defines CPU flags for AM3505/17 and update the clock table. Clock support for new modules will be added by subsequent patches. Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com> [paul@pwsan.com: updated for 2.6.34 clock layout] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock34xx_data.c')
-rw-r--r--arch/arm/mach-omap2/clock34xx_data.c353
1 files changed, 180 insertions, 173 deletions
diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c
index ea8a0fa0088c..cbb421a45763 100644
--- a/arch/arm/mach-omap2/clock34xx_data.c
+++ b/arch/arm/mach-omap2/clock34xx_data.c
@@ -2988,139 +2988,140 @@ static struct clk wdt1_fck = {
2988 * clkdev 2988 * clkdev
2989 */ 2989 */
2990 2990
2991static struct omap_clk omap34xx_clks[] = { 2991/* XXX At some point we should rename this file to clock3xxx_data.c */
2992 CLK(NULL, "omap_32k_fck", &omap_32k_fck, CK_343X), 2992static struct omap_clk omap3xxx_clks[] = {
2993 CLK(NULL, "virt_12m_ck", &virt_12m_ck, CK_343X), 2993 CLK(NULL, "omap_32k_fck", &omap_32k_fck, CK_3XXX),
2994 CLK(NULL, "virt_13m_ck", &virt_13m_ck, CK_343X), 2994 CLK(NULL, "virt_12m_ck", &virt_12m_ck, CK_3XXX),
2995 CLK(NULL, "virt_16_8m_ck", &virt_16_8m_ck, CK_3430ES2), 2995 CLK(NULL, "virt_13m_ck", &virt_13m_ck, CK_3XXX),
2996 CLK(NULL, "virt_19_2m_ck", &virt_19_2m_ck, CK_343X), 2996 CLK(NULL, "virt_16_8m_ck", &virt_16_8m_ck, CK_3430ES2 | CK_AM35XX),
2997 CLK(NULL, "virt_26m_ck", &virt_26m_ck, CK_343X), 2997 CLK(NULL, "virt_19_2m_ck", &virt_19_2m_ck, CK_3XXX),
2998 CLK(NULL, "virt_38_4m_ck", &virt_38_4m_ck, CK_343X), 2998 CLK(NULL, "virt_26m_ck", &virt_26m_ck, CK_3XXX),
2999 CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_343X), 2999 CLK(NULL, "virt_38_4m_ck", &virt_38_4m_ck, CK_3XXX),
3000 CLK(NULL, "sys_ck", &sys_ck, CK_343X), 3000 CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX),
3001 CLK(NULL, "sys_altclk", &sys_altclk, CK_343X), 3001 CLK(NULL, "sys_ck", &sys_ck, CK_3XXX),
3002 CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_343X), 3002 CLK(NULL, "sys_altclk", &sys_altclk, CK_3XXX),
3003 CLK(NULL, "sys_clkout1", &sys_clkout1, CK_343X), 3003 CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_3XXX),
3004 CLK(NULL, "dpll1_ck", &dpll1_ck, CK_343X), 3004 CLK(NULL, "sys_clkout1", &sys_clkout1, CK_3XXX),
3005 CLK(NULL, "dpll1_x2_ck", &dpll1_x2_ck, CK_343X), 3005 CLK(NULL, "dpll1_ck", &dpll1_ck, CK_3XXX),
3006 CLK(NULL, "dpll1_x2m2_ck", &dpll1_x2m2_ck, CK_343X), 3006 CLK(NULL, "dpll1_x2_ck", &dpll1_x2_ck, CK_3XXX),
3007 CLK(NULL, "dpll1_x2m2_ck", &dpll1_x2m2_ck, CK_3XXX),
3007 CLK(NULL, "dpll2_ck", &dpll2_ck, CK_343X), 3008 CLK(NULL, "dpll2_ck", &dpll2_ck, CK_343X),
3008 CLK(NULL, "dpll2_m2_ck", &dpll2_m2_ck, CK_343X), 3009 CLK(NULL, "dpll2_m2_ck", &dpll2_m2_ck, CK_343X),
3009 CLK(NULL, "dpll3_ck", &dpll3_ck, CK_343X), 3010 CLK(NULL, "dpll3_ck", &dpll3_ck, CK_3XXX),
3010 CLK(NULL, "core_ck", &core_ck, CK_343X), 3011 CLK(NULL, "core_ck", &core_ck, CK_3XXX),
3011 CLK(NULL, "dpll3_x2_ck", &dpll3_x2_ck, CK_343X), 3012 CLK(NULL, "dpll3_x2_ck", &dpll3_x2_ck, CK_3XXX),
3012 CLK(NULL, "dpll3_m2_ck", &dpll3_m2_ck, CK_343X), 3013 CLK(NULL, "dpll3_m2_ck", &dpll3_m2_ck, CK_3XXX),
3013 CLK(NULL, "dpll3_m2x2_ck", &dpll3_m2x2_ck, CK_343X), 3014 CLK(NULL, "dpll3_m2x2_ck", &dpll3_m2x2_ck, CK_3XXX),
3014 CLK(NULL, "dpll3_m3_ck", &dpll3_m3_ck, CK_343X), 3015 CLK(NULL, "dpll3_m3_ck", &dpll3_m3_ck, CK_3XXX),
3015 CLK(NULL, "dpll3_m3x2_ck", &dpll3_m3x2_ck, CK_343X), 3016 CLK(NULL, "dpll3_m3x2_ck", &dpll3_m3x2_ck, CK_3XXX),
3016 CLK("etb", "emu_core_alwon_ck", &emu_core_alwon_ck, CK_343X), 3017 CLK("etb", "emu_core_alwon_ck", &emu_core_alwon_ck, CK_3XXX),
3017 CLK(NULL, "dpll4_ck", &dpll4_ck, CK_343X), 3018 CLK(NULL, "dpll4_ck", &dpll4_ck, CK_3XXX),
3018 CLK(NULL, "dpll4_x2_ck", &dpll4_x2_ck, CK_343X), 3019 CLK(NULL, "dpll4_x2_ck", &dpll4_x2_ck, CK_3XXX),
3019 CLK(NULL, "omap_96m_alwon_fck", &omap_96m_alwon_fck, CK_343X), 3020 CLK(NULL, "omap_96m_alwon_fck", &omap_96m_alwon_fck, CK_3XXX),
3020 CLK(NULL, "omap_96m_fck", &omap_96m_fck, CK_343X), 3021 CLK(NULL, "omap_96m_fck", &omap_96m_fck, CK_3XXX),
3021 CLK(NULL, "cm_96m_fck", &cm_96m_fck, CK_343X), 3022 CLK(NULL, "cm_96m_fck", &cm_96m_fck, CK_3XXX),
3022 CLK(NULL, "omap_54m_fck", &omap_54m_fck, CK_343X), 3023 CLK(NULL, "omap_54m_fck", &omap_54m_fck, CK_3XXX),
3023 CLK(NULL, "omap_48m_fck", &omap_48m_fck, CK_343X), 3024 CLK(NULL, "omap_48m_fck", &omap_48m_fck, CK_3XXX),
3024 CLK(NULL, "omap_12m_fck", &omap_12m_fck, CK_343X), 3025 CLK(NULL, "omap_12m_fck", &omap_12m_fck, CK_3XXX),
3025 CLK(NULL, "dpll4_m2_ck", &dpll4_m2_ck, CK_343X), 3026 CLK(NULL, "dpll4_m2_ck", &dpll4_m2_ck, CK_3XXX),
3026 CLK(NULL, "dpll4_m2x2_ck", &dpll4_m2x2_ck, CK_343X), 3027 CLK(NULL, "dpll4_m2x2_ck", &dpll4_m2x2_ck, CK_3XXX),
3027 CLK(NULL, "dpll4_m3_ck", &dpll4_m3_ck, CK_343X), 3028 CLK(NULL, "dpll4_m3_ck", &dpll4_m3_ck, CK_3XXX),
3028 CLK(NULL, "dpll4_m3x2_ck", &dpll4_m3x2_ck, CK_343X), 3029 CLK(NULL, "dpll4_m3x2_ck", &dpll4_m3x2_ck, CK_3XXX),
3029 CLK(NULL, "dpll4_m4_ck", &dpll4_m4_ck, CK_343X), 3030 CLK(NULL, "dpll4_m4_ck", &dpll4_m4_ck, CK_3XXX),
3030 CLK(NULL, "dpll4_m4x2_ck", &dpll4_m4x2_ck, CK_343X), 3031 CLK(NULL, "dpll4_m4x2_ck", &dpll4_m4x2_ck, CK_3XXX),
3031 CLK(NULL, "dpll4_m5_ck", &dpll4_m5_ck, CK_343X), 3032 CLK(NULL, "dpll4_m5_ck", &dpll4_m5_ck, CK_3XXX),
3032 CLK(NULL, "dpll4_m5x2_ck", &dpll4_m5x2_ck, CK_343X), 3033 CLK(NULL, "dpll4_m5x2_ck", &dpll4_m5x2_ck, CK_3XXX),
3033 CLK(NULL, "dpll4_m6_ck", &dpll4_m6_ck, CK_343X), 3034 CLK(NULL, "dpll4_m6_ck", &dpll4_m6_ck, CK_3XXX),
3034 CLK(NULL, "dpll4_m6x2_ck", &dpll4_m6x2_ck, CK_343X), 3035 CLK(NULL, "dpll4_m6x2_ck", &dpll4_m6x2_ck, CK_3XXX),
3035 CLK("etb", "emu_per_alwon_ck", &emu_per_alwon_ck, CK_343X), 3036 CLK("etb", "emu_per_alwon_ck", &emu_per_alwon_ck, CK_3XXX),
3036 CLK(NULL, "dpll5_ck", &dpll5_ck, CK_3430ES2), 3037 CLK(NULL, "dpll5_ck", &dpll5_ck, CK_3430ES2 | CK_AM35XX),
3037 CLK(NULL, "dpll5_m2_ck", &dpll5_m2_ck, CK_3430ES2), 3038 CLK(NULL, "dpll5_m2_ck", &dpll5_m2_ck, CK_3430ES2 | CK_AM35XX),
3038 CLK(NULL, "clkout2_src_ck", &clkout2_src_ck, CK_343X), 3039 CLK(NULL, "clkout2_src_ck", &clkout2_src_ck, CK_3XXX),
3039 CLK(NULL, "sys_clkout2", &sys_clkout2, CK_343X), 3040 CLK(NULL, "sys_clkout2", &sys_clkout2, CK_3XXX),
3040 CLK(NULL, "corex2_fck", &corex2_fck, CK_343X), 3041 CLK(NULL, "corex2_fck", &corex2_fck, CK_3XXX),
3041 CLK(NULL, "dpll1_fck", &dpll1_fck, CK_343X), 3042 CLK(NULL, "dpll1_fck", &dpll1_fck, CK_3XXX),
3042 CLK(NULL, "mpu_ck", &mpu_ck, CK_343X), 3043 CLK(NULL, "mpu_ck", &mpu_ck, CK_3XXX),
3043 CLK(NULL, "arm_fck", &arm_fck, CK_343X), 3044 CLK(NULL, "arm_fck", &arm_fck, CK_3XXX),
3044 CLK("etb", "emu_mpu_alwon_ck", &emu_mpu_alwon_ck, CK_343X), 3045 CLK("etb", "emu_mpu_alwon_ck", &emu_mpu_alwon_ck, CK_3XXX),
3045 CLK(NULL, "dpll2_fck", &dpll2_fck, CK_343X), 3046 CLK(NULL, "dpll2_fck", &dpll2_fck, CK_343X),
3046 CLK(NULL, "iva2_ck", &iva2_ck, CK_343X), 3047 CLK(NULL, "iva2_ck", &iva2_ck, CK_343X),
3047 CLK(NULL, "l3_ick", &l3_ick, CK_343X), 3048 CLK(NULL, "l3_ick", &l3_ick, CK_3XXX),
3048 CLK(NULL, "l4_ick", &l4_ick, CK_343X), 3049 CLK(NULL, "l4_ick", &l4_ick, CK_3XXX),
3049 CLK(NULL, "rm_ick", &rm_ick, CK_343X), 3050 CLK(NULL, "rm_ick", &rm_ick, CK_3XXX),
3050 CLK(NULL, "gfx_l3_ck", &gfx_l3_ck, CK_3430ES1), 3051 CLK(NULL, "gfx_l3_ck", &gfx_l3_ck, CK_3430ES1),
3051 CLK(NULL, "gfx_l3_fck", &gfx_l3_fck, CK_3430ES1), 3052 CLK(NULL, "gfx_l3_fck", &gfx_l3_fck, CK_3430ES1),
3052 CLK(NULL, "gfx_l3_ick", &gfx_l3_ick, CK_3430ES1), 3053 CLK(NULL, "gfx_l3_ick", &gfx_l3_ick, CK_3430ES1),
3053 CLK(NULL, "gfx_cg1_ck", &gfx_cg1_ck, CK_3430ES1), 3054 CLK(NULL, "gfx_cg1_ck", &gfx_cg1_ck, CK_3430ES1),
3054 CLK(NULL, "gfx_cg2_ck", &gfx_cg2_ck, CK_3430ES1), 3055 CLK(NULL, "gfx_cg2_ck", &gfx_cg2_ck, CK_3430ES1),
3055 CLK(NULL, "sgx_fck", &sgx_fck, CK_3430ES2), 3056 CLK(NULL, "sgx_fck", &sgx_fck, CK_3430ES2 | CK_3517),
3056 CLK(NULL, "sgx_ick", &sgx_ick, CK_3430ES2), 3057 CLK(NULL, "sgx_ick", &sgx_ick, CK_3430ES2 | CK_3517),
3057 CLK(NULL, "d2d_26m_fck", &d2d_26m_fck, CK_3430ES1), 3058 CLK(NULL, "d2d_26m_fck", &d2d_26m_fck, CK_3430ES1),
3058 CLK(NULL, "modem_fck", &modem_fck, CK_343X), 3059 CLK(NULL, "modem_fck", &modem_fck, CK_343X),
3059 CLK(NULL, "sad2d_ick", &sad2d_ick, CK_343X), 3060 CLK(NULL, "sad2d_ick", &sad2d_ick, CK_343X),
3060 CLK(NULL, "mad2d_ick", &mad2d_ick, CK_343X), 3061 CLK(NULL, "mad2d_ick", &mad2d_ick, CK_343X),
3061 CLK(NULL, "gpt10_fck", &gpt10_fck, CK_343X), 3062 CLK(NULL, "gpt10_fck", &gpt10_fck, CK_3XXX),
3062 CLK(NULL, "gpt11_fck", &gpt11_fck, CK_343X), 3063 CLK(NULL, "gpt11_fck", &gpt11_fck, CK_3XXX),
3063 CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2), 3064 CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2 | CK_AM35XX),
3064 CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2), 3065 CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2 | CK_AM35XX),
3065 CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2), 3066 CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2 | CK_AM35XX),
3066 CLK(NULL, "core_96m_fck", &core_96m_fck, CK_343X), 3067 CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX),
3067 CLK("mmci-omap-hs.2", "fck", &mmchs3_fck, CK_3430ES2), 3068 CLK("mmci-omap-hs.2", "fck", &mmchs3_fck, CK_3430ES2 | CK_AM35XX),
3068 CLK("mmci-omap-hs.1", "fck", &mmchs2_fck, CK_343X), 3069 CLK("mmci-omap-hs.1", "fck", &mmchs2_fck, CK_3XXX),
3069 CLK(NULL, "mspro_fck", &mspro_fck, CK_343X), 3070 CLK(NULL, "mspro_fck", &mspro_fck, CK_343X),
3070 CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_343X), 3071 CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_3XXX),
3071 CLK("i2c_omap.3", "fck", &i2c3_fck, CK_343X), 3072 CLK("i2c_omap.3", "fck", &i2c3_fck, CK_3XXX),
3072 CLK("i2c_omap.2", "fck", &i2c2_fck, CK_343X), 3073 CLK("i2c_omap.2", "fck", &i2c2_fck, CK_3XXX),
3073 CLK("i2c_omap.1", "fck", &i2c1_fck, CK_343X), 3074 CLK("i2c_omap.1", "fck", &i2c1_fck, CK_3XXX),
3074 CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_343X), 3075 CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_3XXX),
3075 CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_343X), 3076 CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_3XXX),
3076 CLK(NULL, "core_48m_fck", &core_48m_fck, CK_343X), 3077 CLK(NULL, "core_48m_fck", &core_48m_fck, CK_3XXX),
3077 CLK("omap2_mcspi.4", "fck", &mcspi4_fck, CK_343X), 3078 CLK("omap2_mcspi.4", "fck", &mcspi4_fck, CK_3XXX),
3078 CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_343X), 3079 CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_3XXX),
3079 CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_343X), 3080 CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_3XXX),
3080 CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_343X), 3081 CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_3XXX),
3081 CLK(NULL, "uart2_fck", &uart2_fck, CK_343X), 3082 CLK(NULL, "uart2_fck", &uart2_fck, CK_3XXX),
3082 CLK(NULL, "uart1_fck", &uart1_fck, CK_343X), 3083 CLK(NULL, "uart1_fck", &uart1_fck, CK_3XXX),
3083 CLK(NULL, "fshostusb_fck", &fshostusb_fck, CK_3430ES1), 3084 CLK(NULL, "fshostusb_fck", &fshostusb_fck, CK_3430ES1),
3084 CLK(NULL, "core_12m_fck", &core_12m_fck, CK_343X), 3085 CLK(NULL, "core_12m_fck", &core_12m_fck, CK_3XXX),
3085 CLK("omap_hdq.0", "fck", &hdq_fck, CK_343X), 3086 CLK("omap_hdq.0", "fck", &hdq_fck, CK_3XXX),
3086 CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es1, CK_3430ES1), 3087 CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es1, CK_3430ES1),
3087 CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es2, CK_3430ES2), 3088 CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es2, CK_3430ES2),
3088 CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es1, CK_3430ES1), 3089 CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es1, CK_3430ES1),
3089 CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es2, CK_3430ES2), 3090 CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es2, CK_3430ES2),
3090 CLK(NULL, "core_l3_ick", &core_l3_ick, CK_343X), 3091 CLK(NULL, "core_l3_ick", &core_l3_ick, CK_3XXX),
3091 CLK("musb_hdrc", "ick", &hsotgusb_ick_3430es1, CK_3430ES1), 3092 CLK("musb_hdrc", "ick", &hsotgusb_ick_3430es1, CK_3430ES1),
3092 CLK("musb_hdrc", "ick", &hsotgusb_ick_3430es2, CK_3430ES2), 3093 CLK("musb_hdrc", "ick", &hsotgusb_ick_3430es2, CK_3430ES2),
3093 CLK(NULL, "sdrc_ick", &sdrc_ick, CK_343X), 3094 CLK(NULL, "sdrc_ick", &sdrc_ick, CK_3XXX),
3094 CLK(NULL, "gpmc_fck", &gpmc_fck, CK_343X), 3095 CLK(NULL, "gpmc_fck", &gpmc_fck, CK_3XXX),
3095 CLK(NULL, "security_l3_ick", &security_l3_ick, CK_343X), 3096 CLK(NULL, "security_l3_ick", &security_l3_ick, CK_343X),
3096 CLK(NULL, "pka_ick", &pka_ick, CK_343X), 3097 CLK(NULL, "pka_ick", &pka_ick, CK_343X),
3097 CLK(NULL, "core_l4_ick", &core_l4_ick, CK_343X), 3098 CLK(NULL, "core_l4_ick", &core_l4_ick, CK_3XXX),
3098 CLK(NULL, "usbtll_ick", &usbtll_ick, CK_3430ES2), 3099 CLK(NULL, "usbtll_ick", &usbtll_ick, CK_3430ES2 | CK_AM35XX),
3099 CLK("mmci-omap-hs.2", "ick", &mmchs3_ick, CK_3430ES2), 3100 CLK("mmci-omap-hs.2", "ick", &mmchs3_ick, CK_3430ES2 | CK_AM35XX),
3100 CLK(NULL, "icr_ick", &icr_ick, CK_343X), 3101 CLK(NULL, "icr_ick", &icr_ick, CK_343X),
3101 CLK(NULL, "aes2_ick", &aes2_ick, CK_343X), 3102 CLK(NULL, "aes2_ick", &aes2_ick, CK_343X),
3102 CLK(NULL, "sha12_ick", &sha12_ick, CK_343X), 3103 CLK(NULL, "sha12_ick", &sha12_ick, CK_343X),
3103 CLK(NULL, "des2_ick", &des2_ick, CK_343X), 3104 CLK(NULL, "des2_ick", &des2_ick, CK_343X),
3104 CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_343X), 3105 CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_3XXX),
3105 CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_343X), 3106 CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_3XXX),
3106 CLK(NULL, "mspro_ick", &mspro_ick, CK_343X), 3107 CLK(NULL, "mspro_ick", &mspro_ick, CK_343X),
3107 CLK("omap_hdq.0", "ick", &hdq_ick, CK_343X), 3108 CLK("omap_hdq.0", "ick", &hdq_ick, CK_3XXX),
3108 CLK("omap2_mcspi.4", "ick", &mcspi4_ick, CK_343X), 3109 CLK("omap2_mcspi.4", "ick", &mcspi4_ick, CK_3XXX),
3109 CLK("omap2_mcspi.3", "ick", &mcspi3_ick, CK_343X), 3110 CLK("omap2_mcspi.3", "ick", &mcspi3_ick, CK_3XXX),
3110 CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_343X), 3111 CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_3XXX),
3111 CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_343X), 3112 CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_3XXX),
3112 CLK("i2c_omap.3", "ick", &i2c3_ick, CK_343X), 3113 CLK("i2c_omap.3", "ick", &i2c3_ick, CK_3XXX),
3113 CLK("i2c_omap.2", "ick", &i2c2_ick, CK_343X), 3114 CLK("i2c_omap.2", "ick", &i2c2_ick, CK_3XXX),
3114 CLK("i2c_omap.1", "ick", &i2c1_ick, CK_343X), 3115 CLK("i2c_omap.1", "ick", &i2c1_ick, CK_3XXX),
3115 CLK(NULL, "uart2_ick", &uart2_ick, CK_343X), 3116 CLK(NULL, "uart2_ick", &uart2_ick, CK_3XXX),
3116 CLK(NULL, "uart1_ick", &uart1_ick, CK_343X), 3117 CLK(NULL, "uart1_ick", &uart1_ick, CK_3XXX),
3117 CLK(NULL, "gpt11_ick", &gpt11_ick, CK_343X), 3118 CLK(NULL, "gpt11_ick", &gpt11_ick, CK_3XXX),
3118 CLK(NULL, "gpt10_ick", &gpt10_ick, CK_343X), 3119 CLK(NULL, "gpt10_ick", &gpt10_ick, CK_3XXX),
3119 CLK("omap-mcbsp.5", "ick", &mcbsp5_ick, CK_343X), 3120 CLK("omap-mcbsp.5", "ick", &mcbsp5_ick, CK_3XXX),
3120 CLK("omap-mcbsp.1", "ick", &mcbsp1_ick, CK_343X), 3121 CLK("omap-mcbsp.1", "ick", &mcbsp1_ick, CK_3XXX),
3121 CLK(NULL, "fac_ick", &fac_ick, CK_3430ES1), 3122 CLK(NULL, "fac_ick", &fac_ick, CK_3430ES1),
3122 CLK(NULL, "mailboxes_ick", &mailboxes_ick, CK_343X), 3123 CLK(NULL, "mailboxes_ick", &mailboxes_ick, CK_343X),
3123 CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_343X), 3124 CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_3XXX),
3124 CLK(NULL, "ssi_l4_ick", &ssi_l4_ick, CK_343X), 3125 CLK(NULL, "ssi_l4_ick", &ssi_l4_ick, CK_343X),
3125 CLK(NULL, "ssi_ick", &ssi_ick_3430es1, CK_3430ES1), 3126 CLK(NULL, "ssi_ick", &ssi_ick_3430es1, CK_3430ES1),
3126 CLK(NULL, "ssi_ick", &ssi_ick_3430es2, CK_3430ES2), 3127 CLK(NULL, "ssi_ick", &ssi_ick_3430es2, CK_3430ES2),
@@ -3131,83 +3132,83 @@ static struct omap_clk omap34xx_clks[] = {
3131 CLK(NULL, "sha11_ick", &sha11_ick, CK_343X), 3132 CLK(NULL, "sha11_ick", &sha11_ick, CK_343X),
3132 CLK(NULL, "des1_ick", &des1_ick, CK_343X), 3133 CLK(NULL, "des1_ick", &des1_ick, CK_343X),
3133 CLK("omapdss", "dss1_fck", &dss1_alwon_fck_3430es1, CK_3430ES1), 3134 CLK("omapdss", "dss1_fck", &dss1_alwon_fck_3430es1, CK_3430ES1),
3134 CLK("omapdss", "dss1_fck", &dss1_alwon_fck_3430es2, CK_3430ES2), 3135 CLK("omapdss", "dss1_fck", &dss1_alwon_fck_3430es2, CK_3430ES2 | CK_AM35XX),
3135 CLK("omapdss", "tv_fck", &dss_tv_fck, CK_343X), 3136 CLK("omapdss", "tv_fck", &dss_tv_fck, CK_3XXX),
3136 CLK("omapdss", "video_fck", &dss_96m_fck, CK_343X), 3137 CLK("omapdss", "video_fck", &dss_96m_fck, CK_3XXX),
3137 CLK("omapdss", "dss2_fck", &dss2_alwon_fck, CK_343X), 3138 CLK("omapdss", "dss2_fck", &dss2_alwon_fck, CK_3XXX),
3138 CLK("omapdss", "ick", &dss_ick_3430es1, CK_3430ES1), 3139 CLK("omapdss", "ick", &dss_ick_3430es1, CK_3430ES1),
3139 CLK("omapdss", "ick", &dss_ick_3430es2, CK_3430ES2), 3140 CLK("omapdss", "ick", &dss_ick_3430es2, CK_3430ES2 | CK_AM35XX),
3140 CLK(NULL, "cam_mclk", &cam_mclk, CK_343X), 3141 CLK(NULL, "cam_mclk", &cam_mclk, CK_343X),
3141 CLK(NULL, "cam_ick", &cam_ick, CK_343X), 3142 CLK(NULL, "cam_ick", &cam_ick, CK_343X),
3142 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X), 3143 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X),
3143 CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2), 3144 CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2 | CK_AM35XX),
3144 CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2), 3145 CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2 | CK_AM35XX),
3145 CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2), 3146 CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2 | CK_AM35XX),
3146 CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2), 3147 CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2),
3147 CLK(NULL, "gpt1_fck", &gpt1_fck, CK_343X), 3148 CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX),
3148 CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_343X), 3149 CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX),
3149 CLK(NULL, "gpio1_dbck", &gpio1_dbck, CK_343X), 3150 CLK(NULL, "gpio1_dbck", &gpio1_dbck, CK_3XXX),
3150 CLK("omap_wdt", "fck", &wdt2_fck, CK_343X), 3151 CLK("omap_wdt", "fck", &wdt2_fck, CK_3XXX),
3151 CLK(NULL, "wkup_l4_ick", &wkup_l4_ick, CK_343X), 3152 CLK(NULL, "wkup_l4_ick", &wkup_l4_ick, CK_343X),
3152 CLK(NULL, "usim_ick", &usim_ick, CK_3430ES2), 3153 CLK(NULL, "usim_ick", &usim_ick, CK_3430ES2),
3153 CLK("omap_wdt", "ick", &wdt2_ick, CK_343X), 3154 CLK("omap_wdt", "ick", &wdt2_ick, CK_3XXX),
3154 CLK(NULL, "wdt1_ick", &wdt1_ick, CK_343X), 3155 CLK(NULL, "wdt1_ick", &wdt1_ick, CK_3XXX),
3155 CLK(NULL, "gpio1_ick", &gpio1_ick, CK_343X), 3156 CLK(NULL, "gpio1_ick", &gpio1_ick, CK_3XXX),
3156 CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_343X), 3157 CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_3XXX),
3157 CLK(NULL, "gpt12_ick", &gpt12_ick, CK_343X), 3158 CLK(NULL, "gpt12_ick", &gpt12_ick, CK_3XXX),
3158 CLK(NULL, "gpt1_ick", &gpt1_ick, CK_343X), 3159 CLK(NULL, "gpt1_ick", &gpt1_ick, CK_3XXX),
3159 CLK(NULL, "per_96m_fck", &per_96m_fck, CK_343X), 3160 CLK(NULL, "per_96m_fck", &per_96m_fck, CK_3XXX),
3160 CLK(NULL, "per_48m_fck", &per_48m_fck, CK_343X), 3161 CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX),
3161 CLK(NULL, "uart3_fck", &uart3_fck, CK_343X), 3162 CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX),
3162 CLK(NULL, "gpt2_fck", &gpt2_fck, CK_343X), 3163 CLK(NULL, "gpt2_fck", &gpt2_fck, CK_3XXX),
3163 CLK(NULL, "gpt3_fck", &gpt3_fck, CK_343X), 3164 CLK(NULL, "gpt3_fck", &gpt3_fck, CK_3XXX),
3164 CLK(NULL, "gpt4_fck", &gpt4_fck, CK_343X), 3165 CLK(NULL, "gpt4_fck", &gpt4_fck, CK_3XXX),
3165 CLK(NULL, "gpt5_fck", &gpt5_fck, CK_343X), 3166 CLK(NULL, "gpt5_fck", &gpt5_fck, CK_3XXX),
3166 CLK(NULL, "gpt6_fck", &gpt6_fck, CK_343X), 3167 CLK(NULL, "gpt6_fck", &gpt6_fck, CK_3XXX),
3167 CLK(NULL, "gpt7_fck", &gpt7_fck, CK_343X), 3168 CLK(NULL, "gpt7_fck", &gpt7_fck, CK_3XXX),
3168 CLK(NULL, "gpt8_fck", &gpt8_fck, CK_343X), 3169 CLK(NULL, "gpt8_fck", &gpt8_fck, CK_3XXX),
3169 CLK(NULL, "gpt9_fck", &gpt9_fck, CK_343X), 3170 CLK(NULL, "gpt9_fck", &gpt9_fck, CK_3XXX),
3170 CLK(NULL, "per_32k_alwon_fck", &per_32k_alwon_fck, CK_343X), 3171 CLK(NULL, "per_32k_alwon_fck", &per_32k_alwon_fck, CK_3XXX),
3171 CLK(NULL, "gpio6_dbck", &gpio6_dbck, CK_343X), 3172 CLK(NULL, "gpio6_dbck", &gpio6_dbck, CK_3XXX),
3172 CLK(NULL, "gpio5_dbck", &gpio5_dbck, CK_343X), 3173 CLK(NULL, "gpio5_dbck", &gpio5_dbck, CK_3XXX),
3173 CLK(NULL, "gpio4_dbck", &gpio4_dbck, CK_343X), 3174 CLK(NULL, "gpio4_dbck", &gpio4_dbck, CK_3XXX),
3174 CLK(NULL, "gpio3_dbck", &gpio3_dbck, CK_343X), 3175 CLK(NULL, "gpio3_dbck", &gpio3_dbck, CK_3XXX),
3175 CLK(NULL, "gpio2_dbck", &gpio2_dbck, CK_343X), 3176 CLK(NULL, "gpio2_dbck", &gpio2_dbck, CK_3XXX),
3176 CLK(NULL, "wdt3_fck", &wdt3_fck, CK_343X), 3177 CLK(NULL, "wdt3_fck", &wdt3_fck, CK_3XXX),
3177 CLK(NULL, "per_l4_ick", &per_l4_ick, CK_343X), 3178 CLK(NULL, "per_l4_ick", &per_l4_ick, CK_3XXX),
3178 CLK(NULL, "gpio6_ick", &gpio6_ick, CK_343X), 3179 CLK(NULL, "gpio6_ick", &gpio6_ick, CK_3XXX),
3179 CLK(NULL, "gpio5_ick", &gpio5_ick, CK_343X), 3180 CLK(NULL, "gpio5_ick", &gpio5_ick, CK_3XXX),
3180 CLK(NULL, "gpio4_ick", &gpio4_ick, CK_343X), 3181 CLK(NULL, "gpio4_ick", &gpio4_ick, CK_3XXX),
3181 CLK(NULL, "gpio3_ick", &gpio3_ick, CK_343X), 3182 CLK(NULL, "gpio3_ick", &gpio3_ick, CK_3XXX),
3182 CLK(NULL, "gpio2_ick", &gpio2_ick, CK_343X), 3183 CLK(NULL, "gpio2_ick", &gpio2_ick, CK_3XXX),
3183 CLK(NULL, "wdt3_ick", &wdt3_ick, CK_343X), 3184 CLK(NULL, "wdt3_ick", &wdt3_ick, CK_3XXX),
3184 CLK(NULL, "uart3_ick", &uart3_ick, CK_343X), 3185 CLK(NULL, "uart3_ick", &uart3_ick, CK_3XXX),
3185 CLK(NULL, "gpt9_ick", &gpt9_ick, CK_343X), 3186 CLK(NULL, "gpt9_ick", &gpt9_ick, CK_3XXX),
3186 CLK(NULL, "gpt8_ick", &gpt8_ick, CK_343X), 3187 CLK(NULL, "gpt8_ick", &gpt8_ick, CK_3XXX),
3187 CLK(NULL, "gpt7_ick", &gpt7_ick, CK_343X), 3188 CLK(NULL, "gpt7_ick", &gpt7_ick, CK_3XXX),
3188 CLK(NULL, "gpt6_ick", &gpt6_ick, CK_343X), 3189 CLK(NULL, "gpt6_ick", &gpt6_ick, CK_3XXX),
3189 CLK(NULL, "gpt5_ick", &gpt5_ick, CK_343X), 3190 CLK(NULL, "gpt5_ick", &gpt5_ick, CK_3XXX),
3190 CLK(NULL, "gpt4_ick", &gpt4_ick, CK_343X), 3191 CLK(NULL, "gpt4_ick", &gpt4_ick, CK_3XXX),
3191 CLK(NULL, "gpt3_ick", &gpt3_ick, CK_343X), 3192 CLK(NULL, "gpt3_ick", &gpt3_ick, CK_3XXX),
3192 CLK(NULL, "gpt2_ick", &gpt2_ick, CK_343X), 3193 CLK(NULL, "gpt2_ick", &gpt2_ick, CK_3XXX),
3193 CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_343X), 3194 CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_3XXX),
3194 CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_343X), 3195 CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_3XXX),
3195 CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_343X), 3196 CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_3XXX),
3196 CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_343X), 3197 CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_3XXX),
3197 CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_343X), 3198 CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_3XXX),
3198 CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_343X), 3199 CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_3XXX),
3199 CLK("etb", "emu_src_ck", &emu_src_ck, CK_343X), 3200 CLK("etb", "emu_src_ck", &emu_src_ck, CK_3XXX),
3200 CLK(NULL, "pclk_fck", &pclk_fck, CK_343X), 3201 CLK(NULL, "pclk_fck", &pclk_fck, CK_3XXX),
3201 CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_343X), 3202 CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_3XXX),
3202 CLK(NULL, "atclk_fck", &atclk_fck, CK_343X), 3203 CLK(NULL, "atclk_fck", &atclk_fck, CK_3XXX),
3203 CLK(NULL, "traceclk_src_fck", &traceclk_src_fck, CK_343X), 3204 CLK(NULL, "traceclk_src_fck", &traceclk_src_fck, CK_3XXX),
3204 CLK(NULL, "traceclk_fck", &traceclk_fck, CK_343X), 3205 CLK(NULL, "traceclk_fck", &traceclk_fck, CK_3XXX),
3205 CLK(NULL, "sr1_fck", &sr1_fck, CK_343X), 3206 CLK(NULL, "sr1_fck", &sr1_fck, CK_343X),
3206 CLK(NULL, "sr2_fck", &sr2_fck, CK_343X), 3207 CLK(NULL, "sr2_fck", &sr2_fck, CK_343X),
3207 CLK(NULL, "sr_l4_ick", &sr_l4_ick, CK_343X), 3208 CLK(NULL, "sr_l4_ick", &sr_l4_ick, CK_343X),
3208 CLK(NULL, "secure_32k_fck", &secure_32k_fck, CK_343X), 3209 CLK(NULL, "secure_32k_fck", &secure_32k_fck, CK_3XXX),
3209 CLK(NULL, "gpt12_fck", &gpt12_fck, CK_343X), 3210 CLK(NULL, "gpt12_fck", &gpt12_fck, CK_3XXX),
3210 CLK(NULL, "wdt1_fck", &wdt1_fck, CK_343X), 3211 CLK(NULL, "wdt1_fck", &wdt1_fck, CK_3XXX),
3211}; 3212};
3212 3213
3213 3214
@@ -3218,7 +3219,13 @@ int __init omap2_clk_init(void)
3218 /* u32 clkrate; */ 3219 /* u32 clkrate; */
3219 u32 cpu_clkflg = CK_3XXX; 3220 u32 cpu_clkflg = CK_3XXX;
3220 3221
3221 if (cpu_is_omap34xx()) { 3222 if (cpu_is_omap3517()) {
3223 cpu_mask = RATE_IN_343X | RATE_IN_3430ES2;
3224 cpu_clkflg |= CK_3517;
3225 } else if (cpu_is_omap3505()) {
3226 cpu_mask = RATE_IN_343X | RATE_IN_3430ES2;
3227 cpu_clkflg |= CK_3505;
3228 } else if (cpu_is_omap34xx()) {
3222 cpu_mask = RATE_IN_343X; 3229 cpu_mask = RATE_IN_343X;
3223 cpu_clkflg |= CK_343X; 3230 cpu_clkflg |= CK_343X;
3224 3231
@@ -3237,10 +3244,10 @@ int __init omap2_clk_init(void)
3237 3244
3238 clk_init(&omap2_clk_functions); 3245 clk_init(&omap2_clk_functions);
3239 3246
3240 for (c = omap34xx_clks; c < omap34xx_clks + ARRAY_SIZE(omap34xx_clks); c++) 3247 for (c = omap3xxx_clks; c < omap3xxx_clks + ARRAY_SIZE(omap3xxx_clks); c++)
3241 clk_preinit(c->lk.clk); 3248 clk_preinit(c->lk.clk);
3242 3249
3243 for (c = omap34xx_clks; c < omap34xx_clks + ARRAY_SIZE(omap34xx_clks); c++) 3250 for (c = omap3xxx_clks; c < omap3xxx_clks + ARRAY_SIZE(omap3xxx_clks); c++)
3244 if (c->cpu & cpu_clkflg) { 3251 if (c->cpu & cpu_clkflg) {
3245 clkdev_add(&c->lk); 3252 clkdev_add(&c->lk);
3246 clk_register(c->lk.clk); 3253 clk_register(c->lk.clk);
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-28 07:25:28 -0400