diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-11-04 16:24:00 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-02-08 06:38:41 -0500 |
commit | c1168dc31d8e0688168030ac66341897ed7ca32a (patch) | |
tree | 44d1e331bb70d0f305308aec0f60df9066e7946f /arch/arm/mach-omap2/clock34xx.h | |
parent | bc51da4ee46d481dc3fbc57ec407594b80e92705 (diff) |
[ARM] omap: don't use clkops_omap2_dflt_wait for non-ICLK/FCLK clocks
The original code in omap2_clk_wait_ready() used to check the low 8
bits to determine whether they were within the FCLKEN or ICLKEN
registers. Specifically, the test is satisfied when these offsets
are used:
CM_FCLKEN, CM_FCLKEN1, CM_CLKEN, OMAP24XX_CM_FCLKEN2, CM_ICLKEN,
CM_ICLKEN1, CM_ICLKEN2, CM_ICLKEN3, OMAP24XX_CM_ICLKEN4
OMAP3430_CM_CLKEN_PLL, OMAP3430ES2_CM_CLKEN2
If one of these offsets isn't used, omap2_clk_wait_ready() merely
returns without doing anything. So we should use the non-wait clkops
version instead and eliminate that conditional.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2/clock34xx.h')
-rw-r--r-- | arch/arm/mach-omap2/clock34xx.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index 1ff05d351b38..335ef88ada55 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h | |||
@@ -216,7 +216,7 @@ static struct clk mcbsp_clks = { | |||
216 | 216 | ||
217 | static struct clk sys_clkout1 = { | 217 | static struct clk sys_clkout1 = { |
218 | .name = "sys_clkout1", | 218 | .name = "sys_clkout1", |
219 | .ops = &clkops_omap2_dflt_wait, | 219 | .ops = &clkops_omap2_dflt, |
220 | .parent = &osc_sys_ck, | 220 | .parent = &osc_sys_ck, |
221 | .enable_reg = OMAP3430_PRM_CLKOUT_CTRL, | 221 | .enable_reg = OMAP3430_PRM_CLKOUT_CTRL, |
222 | .enable_bit = OMAP3430_CLKOUT_EN_SHIFT, | 222 | .enable_bit = OMAP3430_CLKOUT_EN_SHIFT, |
@@ -967,7 +967,7 @@ static const struct clksel clkout2_src_clksel[] = { | |||
967 | 967 | ||
968 | static struct clk clkout2_src_ck = { | 968 | static struct clk clkout2_src_ck = { |
969 | .name = "clkout2_src_ck", | 969 | .name = "clkout2_src_ck", |
970 | .ops = &clkops_omap2_dflt_wait, | 970 | .ops = &clkops_omap2_dflt, |
971 | .init = &omap2_init_clksel_parent, | 971 | .init = &omap2_init_clksel_parent, |
972 | .enable_reg = OMAP3430_CM_CLKOUT_CTRL, | 972 | .enable_reg = OMAP3430_CM_CLKOUT_CTRL, |
973 | .enable_bit = OMAP3430_CLKOUT2_EN_SHIFT, | 973 | .enable_bit = OMAP3430_CLKOUT2_EN_SHIFT, |
@@ -1356,7 +1356,7 @@ static struct clk gpt11_fck = { | |||
1356 | 1356 | ||
1357 | static struct clk cpefuse_fck = { | 1357 | static struct clk cpefuse_fck = { |
1358 | .name = "cpefuse_fck", | 1358 | .name = "cpefuse_fck", |
1359 | .ops = &clkops_omap2_dflt_wait, | 1359 | .ops = &clkops_omap2_dflt, |
1360 | .parent = &sys_ck, | 1360 | .parent = &sys_ck, |
1361 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), | 1361 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), |
1362 | .enable_bit = OMAP3430ES2_EN_CPEFUSE_SHIFT, | 1362 | .enable_bit = OMAP3430ES2_EN_CPEFUSE_SHIFT, |
@@ -1366,7 +1366,7 @@ static struct clk cpefuse_fck = { | |||
1366 | 1366 | ||
1367 | static struct clk ts_fck = { | 1367 | static struct clk ts_fck = { |
1368 | .name = "ts_fck", | 1368 | .name = "ts_fck", |
1369 | .ops = &clkops_omap2_dflt_wait, | 1369 | .ops = &clkops_omap2_dflt, |
1370 | .parent = &omap_32k_fck, | 1370 | .parent = &omap_32k_fck, |
1371 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), | 1371 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), |
1372 | .enable_bit = OMAP3430ES2_EN_TS_SHIFT, | 1372 | .enable_bit = OMAP3430ES2_EN_TS_SHIFT, |
@@ -1376,7 +1376,7 @@ static struct clk ts_fck = { | |||
1376 | 1376 | ||
1377 | static struct clk usbtll_fck = { | 1377 | static struct clk usbtll_fck = { |
1378 | .name = "usbtll_fck", | 1378 | .name = "usbtll_fck", |
1379 | .ops = &clkops_omap2_dflt_wait, | 1379 | .ops = &clkops_omap2_dflt, |
1380 | .parent = &omap_120m_fck, | 1380 | .parent = &omap_120m_fck, |
1381 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), | 1381 | .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), |
1382 | .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT, | 1382 | .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT, |
@@ -2295,7 +2295,7 @@ static struct clk usbhost_ick = { | |||
2295 | 2295 | ||
2296 | static struct clk usbhost_sar_fck = { | 2296 | static struct clk usbhost_sar_fck = { |
2297 | .name = "usbhost_sar_fck", | 2297 | .name = "usbhost_sar_fck", |
2298 | .ops = &clkops_omap2_dflt_wait, | 2298 | .ops = &clkops_omap2_dflt, |
2299 | .parent = &osc_sys_ck, | 2299 | .parent = &osc_sys_ck, |
2300 | .init = &omap2_init_clk_clkdm, | 2300 | .init = &omap2_init_clk_clkdm, |
2301 | .enable_reg = OMAP_PRM_REGADDR(OMAP3430ES2_USBHOST_MOD, PM_PWSTCTRL), | 2301 | .enable_reg = OMAP_PRM_REGADDR(OMAP3430ES2_USBHOST_MOD, PM_PWSTCTRL), |