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authorIngo Molnar <mingo@elte.hu>2009-05-07 05:17:13 -0400
committerIngo Molnar <mingo@elte.hu>2009-05-07 05:17:34 -0400
commit44347d947f628060b92449702071bfe1d31dfb75 (patch)
treec6ed74610d5b3295df4296659f80f5feb94b28cc /arch/arm/mach-omap2/clock34xx.h
parentd94fc523f3c35bd8013f04827e94756cbc0212f4 (diff)
parent413f81eba35d6ede9289b0c8a920c013a84fac71 (diff)
Merge branch 'linus' into tracing/core
Merge reason: tracing/core was on a .30-rc1 base and was missing out on on a handful of tracing fixes present in .30-rc5-almost. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mach-omap2/clock34xx.h')
-rw-r--r--arch/arm/mach-omap2/clock34xx.h7
1 files changed, 3 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 70ec10deb654..6763b8f73028 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -2052,7 +2052,7 @@ static struct clk dss_ick = {
2052 2052
2053static struct clk cam_mclk = { 2053static struct clk cam_mclk = {
2054 .name = "cam_mclk", 2054 .name = "cam_mclk",
2055 .ops = &clkops_omap2_dflt_wait, 2055 .ops = &clkops_omap2_dflt,
2056 .parent = &dpll4_m5x2_ck, 2056 .parent = &dpll4_m5x2_ck,
2057 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), 2057 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
2058 .enable_bit = OMAP3430_EN_CAM_SHIFT, 2058 .enable_bit = OMAP3430_EN_CAM_SHIFT,
@@ -2063,7 +2063,7 @@ static struct clk cam_mclk = {
2063static struct clk cam_ick = { 2063static struct clk cam_ick = {
2064 /* Handles both L3 and L4 clocks */ 2064 /* Handles both L3 and L4 clocks */
2065 .name = "cam_ick", 2065 .name = "cam_ick",
2066 .ops = &clkops_omap2_dflt_wait, 2066 .ops = &clkops_omap2_dflt,
2067 .parent = &l4_ick, 2067 .parent = &l4_ick,
2068 .init = &omap2_init_clk_clkdm, 2068 .init = &omap2_init_clk_clkdm,
2069 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN), 2069 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
@@ -2074,7 +2074,7 @@ static struct clk cam_ick = {
2074 2074
2075static struct clk csi2_96m_fck = { 2075static struct clk csi2_96m_fck = {
2076 .name = "csi2_96m_fck", 2076 .name = "csi2_96m_fck",
2077 .ops = &clkops_omap2_dflt_wait, 2077 .ops = &clkops_omap2_dflt,
2078 .parent = &core_96m_fck, 2078 .parent = &core_96m_fck,
2079 .init = &omap2_init_clk_clkdm, 2079 .init = &omap2_init_clk_clkdm,
2080 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), 2080 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
@@ -2901,7 +2901,6 @@ static struct clk sr_l4_ick = {
2901 2901
2902/* SECURE_32K_FCK clocks */ 2902/* SECURE_32K_FCK clocks */
2903 2903
2904/* XXX This clock no longer exists in 3430 TRM rev F */
2905static struct clk gpt12_fck = { 2904static struct clk gpt12_fck = {
2906 .name = "gpt12_fck", 2905 .name = "gpt12_fck",
2907 .ops = &clkops_null, 2906 .ops = &clkops_null,