diff options
author | Paul Walmsley <paul@pwsan.com> | 2009-06-19 21:08:25 -0400 |
---|---|---|
committer | paul <paul@twilight.(none)> | 2009-06-19 21:09:30 -0400 |
commit | 2f135eaf182761bb9a5cbd5138a447b0ad2a1fef (patch) | |
tree | ceac7506d9d004dc0f6b2aaf56fd395fe411c1d7 /arch/arm/mach-omap2/clock34xx.c | |
parent | 6adb8f388ef2f23d4a81e1e42d15f22d62749a06 (diff) |
OMAP3 clock: initialize SDRC timings at kernel start
On the OMAP3, initialize SDRC timings when the kernel boots. This ensures
that the kernel is running with known, optimized SDRC timings, rather than
whatever was configured by the bootloader.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock34xx.c')
-rw-r--r-- | arch/arm/mach-omap2/clock34xx.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 9e43fe5209d3..5458ab3bf65a 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c | |||
@@ -718,9 +718,6 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) | |||
718 | if (clk != &dpll3_m2_ck) | 718 | if (clk != &dpll3_m2_ck) |
719 | return -EINVAL; | 719 | return -EINVAL; |
720 | 720 | ||
721 | if (rate == clk->rate) | ||
722 | return 0; | ||
723 | |||
724 | validrate = omap2_clksel_round_rate_div(clk, rate, &new_div); | 721 | validrate = omap2_clksel_round_rate_div(clk, rate, &new_div); |
725 | if (validrate != rate) | 722 | if (validrate != rate) |
726 | return -EINVAL; | 723 | return -EINVAL; |