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authorPaul Walmsley <paul@pwsan.com>2010-05-18 20:40:24 -0400
committerPaul Walmsley <paul@pwsan.com>2010-05-20 14:31:06 -0400
commitd74b4949714741f4c58cd1801a6a92737b89a61c (patch)
treea0e838fff3cab45bfba0c319fcdf7f1ea594686f /arch/arm/mach-omap2/clock2420_data.c
parent275f675c24a16ea45cc78bc03ff73fd06be8bffb (diff)
OMAP2+ clock: remove DEFAULT_RATE clksel_rate flag
The DEFAULT_RATE clksel_rate flag is essentially useless. It was set on some of the lowest divisors, which, when switching to a much higher-rate parent, could have potentially resulted in rates that exceeded the hardware specifications for downstream clocks in the window between the clk_set_parent(), and a subsequent clk_set_rate(). It seems much safer to just remove the flag and always use the highest available divisor (resulting in the lowest possible rate) after the switch, and this patch does so. Ideally, it would be best to first attempt to switch to a divisor that matches the clock's rate with the previous parent, if at all possible. But that is a project for some other day or some other person. The parent changing code is rarely used. Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock2420_data.c')
-rw-r--r--arch/arm/mach-omap2/clock2420_data.c46
1 files changed, 23 insertions, 23 deletions
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index 1381e767ce31..23bc981574f6 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -155,12 +155,12 @@ static struct clk apll54_ck = {
155/* func_54m_ck */ 155/* func_54m_ck */
156 156
157static const struct clksel_rate func_54m_apll54_rates[] = { 157static const struct clksel_rate func_54m_apll54_rates[] = {
158 { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE }, 158 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
159 { .div = 0 }, 159 { .div = 0 },
160}; 160};
161 161
162static const struct clksel_rate func_54m_alt_rates[] = { 162static const struct clksel_rate func_54m_alt_rates[] = {
163 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 163 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
164 { .div = 0 }, 164 { .div = 0 },
165}; 165};
166 166
@@ -201,12 +201,12 @@ static struct clk func_96m_ck = {
201/* func_48m_ck */ 201/* func_48m_ck */
202 202
203static const struct clksel_rate func_48m_apll96_rates[] = { 203static const struct clksel_rate func_48m_apll96_rates[] = {
204 { .div = 2, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE }, 204 { .div = 2, .val = 0, .flags = RATE_IN_24XX },
205 { .div = 0 }, 205 { .div = 0 },
206}; 206};
207 207
208static const struct clksel_rate func_48m_alt_rates[] = { 208static const struct clksel_rate func_48m_alt_rates[] = {
209 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 209 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
210 { .div = 0 }, 210 { .div = 0 },
211}; 211};
212 212
@@ -256,22 +256,22 @@ static struct clk wdt1_osc_ck = {
256 * flags fields, which mark them as 2420-only. 256 * flags fields, which mark them as 2420-only.
257 */ 257 */
258static const struct clksel_rate common_clkout_src_core_rates[] = { 258static const struct clksel_rate common_clkout_src_core_rates[] = {
259 { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE }, 259 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
260 { .div = 0 } 260 { .div = 0 }
261}; 261};
262 262
263static const struct clksel_rate common_clkout_src_sys_rates[] = { 263static const struct clksel_rate common_clkout_src_sys_rates[] = {
264 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 264 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
265 { .div = 0 } 265 { .div = 0 }
266}; 266};
267 267
268static const struct clksel_rate common_clkout_src_96m_rates[] = { 268static const struct clksel_rate common_clkout_src_96m_rates[] = {
269 { .div = 1, .val = 2, .flags = RATE_IN_24XX | DEFAULT_RATE }, 269 { .div = 1, .val = 2, .flags = RATE_IN_24XX },
270 { .div = 0 } 270 { .div = 0 }
271}; 271};
272 272
273static const struct clksel_rate common_clkout_src_54m_rates[] = { 273static const struct clksel_rate common_clkout_src_54m_rates[] = {
274 { .div = 1, .val = 3, .flags = RATE_IN_24XX | DEFAULT_RATE }, 274 { .div = 1, .val = 3, .flags = RATE_IN_24XX },
275 { .div = 0 } 275 { .div = 0 }
276}; 276};
277 277
@@ -300,7 +300,7 @@ static struct clk sys_clkout_src = {
300}; 300};
301 301
302static const struct clksel_rate common_clkout_rates[] = { 302static const struct clksel_rate common_clkout_rates[] = {
303 { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE }, 303 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
304 { .div = 2, .val = 1, .flags = RATE_IN_24XX }, 304 { .div = 2, .val = 1, .flags = RATE_IN_24XX },
305 { .div = 4, .val = 2, .flags = RATE_IN_24XX }, 305 { .div = 4, .val = 2, .flags = RATE_IN_24XX },
306 { .div = 8, .val = 3, .flags = RATE_IN_24XX }, 306 { .div = 8, .val = 3, .flags = RATE_IN_24XX },
@@ -384,7 +384,7 @@ static struct clk emul_ck = {
384 * 384 *
385 */ 385 */
386static const struct clksel_rate mpu_core_rates[] = { 386static const struct clksel_rate mpu_core_rates[] = {
387 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 387 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
388 { .div = 2, .val = 2, .flags = RATE_IN_24XX }, 388 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
389 { .div = 4, .val = 4, .flags = RATE_IN_242X }, 389 { .div = 4, .val = 4, .flags = RATE_IN_242X },
390 { .div = 6, .val = 6, .flags = RATE_IN_242X }, 390 { .div = 6, .val = 6, .flags = RATE_IN_242X },
@@ -420,7 +420,7 @@ static struct clk mpu_ck = { /* Control cpu */
420 * routed into a synchronizer and out of clocks abc. 420 * routed into a synchronizer and out of clocks abc.
421 */ 421 */
422static const struct clksel_rate dsp_fck_core_rates[] = { 422static const struct clksel_rate dsp_fck_core_rates[] = {
423 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 423 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
424 { .div = 2, .val = 2, .flags = RATE_IN_24XX }, 424 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
425 { .div = 3, .val = 3, .flags = RATE_IN_24XX }, 425 { .div = 3, .val = 3, .flags = RATE_IN_24XX },
426 { .div = 4, .val = 4, .flags = RATE_IN_24XX }, 426 { .div = 4, .val = 4, .flags = RATE_IN_24XX },
@@ -450,7 +450,7 @@ static struct clk dsp_fck = {
450 450
451/* DSP interface clock */ 451/* DSP interface clock */
452static const struct clksel_rate dsp_irate_ick_rates[] = { 452static const struct clksel_rate dsp_irate_ick_rates[] = {
453 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 453 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
454 { .div = 2, .val = 2, .flags = RATE_IN_24XX }, 454 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
455 { .div = 0 }, 455 { .div = 0 },
456}; 456};
@@ -532,7 +532,7 @@ static struct clk iva1_mpu_int_ifck = {
532static const struct clksel_rate core_l3_core_rates[] = { 532static const struct clksel_rate core_l3_core_rates[] = {
533 { .div = 1, .val = 1, .flags = RATE_IN_24XX }, 533 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
534 { .div = 2, .val = 2, .flags = RATE_IN_242X }, 534 { .div = 2, .val = 2, .flags = RATE_IN_242X },
535 { .div = 4, .val = 4, .flags = RATE_IN_24XX | DEFAULT_RATE }, 535 { .div = 4, .val = 4, .flags = RATE_IN_24XX },
536 { .div = 6, .val = 6, .flags = RATE_IN_24XX }, 536 { .div = 6, .val = 6, .flags = RATE_IN_24XX },
537 { .div = 8, .val = 8, .flags = RATE_IN_242X }, 537 { .div = 8, .val = 8, .flags = RATE_IN_242X },
538 { .div = 12, .val = 12, .flags = RATE_IN_242X }, 538 { .div = 12, .val = 12, .flags = RATE_IN_242X },
@@ -559,7 +559,7 @@ static struct clk core_l3_ck = { /* Used for ick and fck, interconnect */
559/* usb_l4_ick */ 559/* usb_l4_ick */
560static const struct clksel_rate usb_l4_ick_core_l3_rates[] = { 560static const struct clksel_rate usb_l4_ick_core_l3_rates[] = {
561 { .div = 1, .val = 1, .flags = RATE_IN_24XX }, 561 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
562 { .div = 2, .val = 2, .flags = RATE_IN_24XX | DEFAULT_RATE }, 562 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
563 { .div = 4, .val = 4, .flags = RATE_IN_24XX }, 563 { .div = 4, .val = 4, .flags = RATE_IN_24XX },
564 { .div = 0 } 564 { .div = 0 }
565}; 565};
@@ -591,7 +591,7 @@ static struct clk usb_l4_ick = { /* FS-USB interface clock */
591 * this domain. 591 * this domain.
592 */ 592 */
593static const struct clksel_rate l4_core_l3_rates[] = { 593static const struct clksel_rate l4_core_l3_rates[] = {
594 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 594 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
595 { .div = 2, .val = 2, .flags = RATE_IN_24XX }, 595 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
596 { .div = 0 } 596 { .div = 0 }
597}; 597};
@@ -622,7 +622,7 @@ static struct clk l4_ck = { /* used both as an ick and fck */
622 */ 622 */
623static const struct clksel_rate ssi_ssr_sst_fck_core_rates[] = { 623static const struct clksel_rate ssi_ssr_sst_fck_core_rates[] = {
624 { .div = 1, .val = 1, .flags = RATE_IN_24XX }, 624 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
625 { .div = 2, .val = 2, .flags = RATE_IN_24XX | DEFAULT_RATE }, 625 { .div = 2, .val = 2, .flags = RATE_IN_24XX },
626 { .div = 3, .val = 3, .flags = RATE_IN_24XX }, 626 { .div = 3, .val = 3, .flags = RATE_IN_24XX },
627 { .div = 4, .val = 4, .flags = RATE_IN_24XX }, 627 { .div = 4, .val = 4, .flags = RATE_IN_24XX },
628 { .div = 6, .val = 6, .flags = RATE_IN_242X }, 628 { .div = 6, .val = 6, .flags = RATE_IN_242X },
@@ -730,7 +730,7 @@ static struct clk gfx_ick = {
730/* XXX Add RATE_NOT_VALIDATED */ 730/* XXX Add RATE_NOT_VALIDATED */
731 731
732static const struct clksel_rate dss1_fck_sys_rates[] = { 732static const struct clksel_rate dss1_fck_sys_rates[] = {
733 { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE }, 733 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
734 { .div = 0 } 734 { .div = 0 }
735}; 735};
736 736
@@ -744,7 +744,7 @@ static const struct clksel_rate dss1_fck_core_rates[] = {
744 { .div = 8, .val = 8, .flags = RATE_IN_24XX }, 744 { .div = 8, .val = 8, .flags = RATE_IN_24XX },
745 { .div = 9, .val = 9, .flags = RATE_IN_24XX }, 745 { .div = 9, .val = 9, .flags = RATE_IN_24XX },
746 { .div = 12, .val = 12, .flags = RATE_IN_24XX }, 746 { .div = 12, .val = 12, .flags = RATE_IN_24XX },
747 { .div = 16, .val = 16, .flags = RATE_IN_24XX | DEFAULT_RATE }, 747 { .div = 16, .val = 16, .flags = RATE_IN_24XX },
748 { .div = 0 } 748 { .div = 0 }
749}; 749};
750 750
@@ -779,12 +779,12 @@ static struct clk dss1_fck = {
779}; 779};
780 780
781static const struct clksel_rate dss2_fck_sys_rates[] = { 781static const struct clksel_rate dss2_fck_sys_rates[] = {
782 { .div = 1, .val = 0, .flags = RATE_IN_24XX | DEFAULT_RATE }, 782 { .div = 1, .val = 0, .flags = RATE_IN_24XX },
783 { .div = 0 } 783 { .div = 0 }
784}; 784};
785 785
786static const struct clksel_rate dss2_fck_48m_rates[] = { 786static const struct clksel_rate dss2_fck_48m_rates[] = {
787 { .div = 1, .val = 1, .flags = RATE_IN_24XX | DEFAULT_RATE }, 787 { .div = 1, .val = 1, .flags = RATE_IN_24XX },
788 { .div = 0 } 788 { .div = 0 }
789}; 789};
790 790
@@ -825,7 +825,7 @@ static struct clk dss_54m_fck = { /* Alt clk used in power management */
825 * functional clock parents. 825 * functional clock parents.
826 */ 826 */
827static const struct clksel_rate gpt_alt_rates[] = { 827static const struct clksel_rate gpt_alt_rates[] = {
828 { .div = 1, .val = 2, .flags = RATE_IN_24XX | DEFAULT_RATE }, 828 { .div = 1, .val = 2, .flags = RATE_IN_24XX },
829 { .div = 0 } 829 { .div = 0 }
830}; 830};
831 831
@@ -1588,7 +1588,7 @@ static struct clk vlynq_ick = {
1588}; 1588};
1589 1589
1590static const struct clksel_rate vlynq_fck_96m_rates[] = { 1590static const struct clksel_rate vlynq_fck_96m_rates[] = {
1591 { .div = 1, .val = 0, .flags = RATE_IN_242X | DEFAULT_RATE }, 1591 { .div = 1, .val = 0, .flags = RATE_IN_242X },
1592 { .div = 0 } 1592 { .div = 0 }
1593}; 1593};
1594 1594
@@ -1601,7 +1601,7 @@ static const struct clksel_rate vlynq_fck_core_rates[] = {
1601 { .div = 8, .val = 8, .flags = RATE_IN_242X }, 1601 { .div = 8, .val = 8, .flags = RATE_IN_242X },
1602 { .div = 9, .val = 9, .flags = RATE_IN_242X }, 1602 { .div = 9, .val = 9, .flags = RATE_IN_242X },
1603 { .div = 12, .val = 12, .flags = RATE_IN_242X }, 1603 { .div = 12, .val = 12, .flags = RATE_IN_242X },
1604 { .div = 16, .val = 16, .flags = RATE_IN_242X | DEFAULT_RATE }, 1604 { .div = 16, .val = 16, .flags = RATE_IN_242X },
1605 { .div = 18, .val = 18, .flags = RATE_IN_242X }, 1605 { .div = 18, .val = 18, .flags = RATE_IN_242X },
1606 { .div = 0 } 1606 { .div = 0 }
1607}; 1607};