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authorRajendra Nayak <rnayak@ti.com>2009-12-08 20:47:17 -0500
committerpaul <paul@twilight.(none)>2009-12-11 19:00:47 -0500
commit911bd7395c4aa4e74b13aab790ca1500c59fae02 (patch)
tree6fdca6b205015558663dcfa523f87d6c6ffa7afa /arch/arm/mach-omap2/clock.h
parent16975a79c8e6ee424331f52649f2351d33c7b972 (diff)
ARM: OMAP4: PM: Add init api for DPLL nodes
An api at init for all dpll nodes seem to be needed to reparent the dpll clk node to its bypass clk in case the dpll is in bypass. If not done this causes sequencing issues at init during propogate_rate. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock.h')
-rw-r--r--arch/arm/mach-omap2/clock.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 8418f3a22e60..93c48df3b5b1 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -82,6 +82,7 @@ unsigned long omap2_fixed_divisor_recalc(struct clk *clk);
82long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate); 82long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate);
83int omap2_clksel_set_rate(struct clk *clk, unsigned long rate); 83int omap2_clksel_set_rate(struct clk *clk, unsigned long rate);
84u32 omap2_get_dpll_rate(struct clk *clk); 84u32 omap2_get_dpll_rate(struct clk *clk);
85void omap2_init_dpll_parent(struct clk *clk);
85int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name); 86int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name);
86void omap2_clk_prepare_for_reboot(void); 87void omap2_clk_prepare_for_reboot(void);
87int omap2_dflt_clk_enable(struct clk *clk); 88int omap2_dflt_clk_enable(struct clk *clk);