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| author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-31 16:40:29 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-31 16:40:29 -0400 |
| commit | 57eb06e584be3b702d1ba5c39e0b57ddcdabdc66 (patch) | |
| tree | 2b438f438748ff0c9dec86ee44cfb615f7ccee46 /arch/arm/mach-omap2/clock.c | |
| parent | 2ed45b07c957e37db88d7d3696b63eb79b0ef5ef (diff) | |
| parent | 558de8a74efe37a4b5e2ef944da17d23e701dd98 (diff) | |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 4634/1: DaVinci GPIO header build fix
[ARM] 4636/1: pxa: add default configuration for zylonite
[ARM] 4635/1: pxa: Change Eric Miao's email address to eric.miao@marvell.com
[ARM] Fix assignment instead of condition in arm/mach-omap2/clock.c
[ARM] nommu: fix breakage caused by f9720205d1f847cb59e197e851b5276425363f6b
[ARM] pxa: shut up CLOCK_EVT_MODE_RESUME warning
[ARM] Fix FIQ issue with ARM926
[ARM] Fix pxamci regression
[ARM] Fix netx_defconfig regression
[ARM] Fix ateb9200_defconfig build regression
[ARM] Fix an rpc_defconfig regression
[ARM] Fix omap_h2_1610_defconfig regressions
[ARM] 4632/1: Fix a typo in include/asm-arm/plat-s3c/regs-nand.h
Diffstat (limited to 'arch/arm/mach-omap2/clock.c')
| -rw-r--r-- | arch/arm/mach-omap2/clock.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index d9af4367f8bb..e6e85b7b097b 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c | |||
| @@ -651,7 +651,7 @@ static u32 omap2_get_clksel(u32 *div_sel, u32 *field_mask, | |||
| 651 | break; | 651 | break; |
| 652 | case CM_SYSCLKOUT_SEL1: | 652 | case CM_SYSCLKOUT_SEL1: |
| 653 | div_addr = (u32)&PRCM_CLKOUT_CTRL; | 653 | div_addr = (u32)&PRCM_CLKOUT_CTRL; |
| 654 | if ((div_off == 3) || (div_off = 11)) | 654 | if ((div_off == 3) || (div_off == 11)) |
| 655 | mask= 0x3; | 655 | mask= 0x3; |
| 656 | break; | 656 | break; |
| 657 | case CM_CORE_SEL1: | 657 | case CM_CORE_SEL1: |