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authorPaul Walmsley <paul@pwsan.com>2012-09-23 19:15:11 -0400
committerPaul Walmsley <paul@pwsan.com>2012-09-23 19:15:11 -0400
commit2910f14584eddf2bc0db4baec3c6950ef357b52c (patch)
tree7396768abc8e9dfcf45e9376ac7405c6ae36339c /arch/arm/mach-omap2/clock.c
parent5698bd757d55b1bb87edd1a9744ab09c142abfc2 (diff)
parent7852ec0536ca39cefffc6301dc77f8ae55592926 (diff)
Merge tag 'omap-cleanup-b-for-3.7' into test_v3.6-rc6_ocb3.7_cff3.7_odaf3.7
smatch and string-wrapping cleanups for the OMAP subarch code. These changes fix some of the more meaningful warnings that smatch returns for the OMAP subarch code, and unwraps strings that are wrapped at the 80-column boundary, to conform with the current practice. Basic build, boot, and PM logs are available here: http://www.pwsan.com/omap/testlogs/warnings_a_cleanup_3.7/20120912025927/
Diffstat (limited to 'arch/arm/mach-omap2/clock.c')
-rw-r--r--arch/arm/mach-omap2/clock.c20
1 files changed, 8 insertions, 12 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index ea3f565ba1a4..eeaf35367c80 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -102,8 +102,8 @@ void omap2_init_clk_clkdm(struct clk *clk)
102 clk->name, clk->clkdm_name); 102 clk->name, clk->clkdm_name);
103 clk->clkdm = clkdm; 103 clk->clkdm = clkdm;
104 } else { 104 } else {
105 pr_debug("clock: could not associate clk %s to " 105 pr_debug("clock: could not associate clk %s to clkdm %s\n",
106 "clkdm %s\n", clk->name, clk->clkdm_name); 106 clk->name, clk->clkdm_name);
107 } 107 }
108} 108}
109 109
@@ -226,8 +226,7 @@ void omap2_dflt_clk_disable(struct clk *clk)
226 * 'Independent' here refers to a clock which is not 226 * 'Independent' here refers to a clock which is not
227 * controlled by its parent. 227 * controlled by its parent.
228 */ 228 */
229 printk(KERN_ERR "clock: clk_disable called on independent " 229 pr_err("clock: clk_disable called on independent clock %s which has no enable_reg\n", clk->name);
230 "clock %s which has no enable_reg\n", clk->name);
231 return; 230 return;
232 } 231 }
233 232
@@ -270,8 +269,7 @@ const struct clkops clkops_omap2_dflt = {
270void omap2_clk_disable(struct clk *clk) 269void omap2_clk_disable(struct clk *clk)
271{ 270{
272 if (clk->usecount == 0) { 271 if (clk->usecount == 0) {
273 WARN(1, "clock: %s: omap2_clk_disable() called, but usecount " 272 WARN(1, "clock: %s: omap2_clk_disable() called, but usecount already 0?", clk->name);
274 "already 0?", clk->name);
275 return; 273 return;
276 } 274 }
277 275
@@ -332,8 +330,8 @@ int omap2_clk_enable(struct clk *clk)
332 if (clkdm_control && clk->clkdm) { 330 if (clkdm_control && clk->clkdm) {
333 ret = clkdm_clk_enable(clk->clkdm, clk); 331 ret = clkdm_clk_enable(clk->clkdm, clk);
334 if (ret) { 332 if (ret) {
335 WARN(1, "clock: %s: could not enable clockdomain %s: " 333 WARN(1, "clock: %s: could not enable clockdomain %s: %d\n",
336 "%d\n", clk->name, clk->clkdm->name, ret); 334 clk->name, clk->clkdm->name, ret);
337 goto oce_err2; 335 goto oce_err2;
338 } 336 }
339 } 337 }
@@ -501,10 +499,8 @@ void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name,
501 499
502 hfclkin_rate = clk_get_rate(hfclkin_ck); 500 hfclkin_rate = clk_get_rate(hfclkin_ck);
503 501
504 pr_info("Switched to new clocking rate (Crystal/Core/MPU): " 502 pr_info("Switched to new clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
505 "%ld.%01ld/%ld/%ld MHz\n", 503 (hfclkin_rate / 1000000), ((hfclkin_rate / 100000) % 10),
506 (hfclkin_rate / 1000000),
507 ((hfclkin_rate / 100000) % 10),
508 (clk_get_rate(core_ck) / 1000000), 504 (clk_get_rate(core_ck) / 1000000),
509 (clk_get_rate(mpu_ck) / 1000000)); 505 (clk_get_rate(mpu_ck) / 1000000));
510} 506}