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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-11-04 13:59:32 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-08 06:38:40 -0500
commitbc51da4ee46d481dc3fbc57ec407594b80e92705 (patch)
tree35f3ad987f9c655127bd449a703b1222e6209484 /arch/arm/mach-omap2/clock.c
parentb36ee724208358bd892ad279efce629740517149 (diff)
[ARM] omap: eliminate unnecessary conditionals in omap2_clk_wait_ready
Rather than employing run-time tests in omap2_clk_wait_ready() to decide whether we need to wait for the clock to become ready, we can set the .ops appropriately. This change deals with the OMAP24xx and OMAP34xx conditionals only. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2/clock.c')
-rw-r--r--arch/arm/mach-omap2/clock.c42
1 files changed, 22 insertions, 20 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 8c09711d2eaf..986c9f582752 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -237,23 +237,6 @@ static void omap2_clk_wait_ready(struct clk *clk)
237 else 237 else
238 return; 238 return;
239 239
240 /* REVISIT: What are the appropriate exclusions for 34XX? */
241 /* No check for DSS or cam clocks */
242 if (cpu_is_omap24xx() && ((u32)reg & 0x0f) == 0) { /* CM_{F,I}CLKEN1 */
243 if (clk->enable_bit == OMAP24XX_EN_DSS2_SHIFT ||
244 clk->enable_bit == OMAP24XX_EN_DSS1_SHIFT ||
245 clk->enable_bit == OMAP24XX_EN_CAM_SHIFT)
246 return;
247 }
248
249 /* REVISIT: What are the appropriate exclusions for 34XX? */
250 /* OMAP3: ignore DSS-mod clocks */
251 if (cpu_is_omap34xx() &&
252 (((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(OMAP3430_DSS_MOD, 0) ||
253 ((((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(CORE_MOD, 0)) &&
254 clk->enable_bit == OMAP3430_EN_SSI_SHIFT)))
255 return;
256
257 /* Check if both functional and interface clocks 240 /* Check if both functional and interface clocks
258 * are running. */ 241 * are running. */
259 bit = 1 << clk->enable_bit; 242 bit = 1 << clk->enable_bit;
@@ -264,7 +247,7 @@ static void omap2_clk_wait_ready(struct clk *clk)
264 omap2_wait_clock_ready(st_reg, bit, clk->name); 247 omap2_wait_clock_ready(st_reg, bit, clk->name);
265} 248}
266 249
267static int omap2_dflt_clk_enable_wait(struct clk *clk) 250static int omap2_dflt_clk_enable(struct clk *clk)
268{ 251{
269 u32 regval32; 252 u32 regval32;
270 253
@@ -282,11 +265,25 @@ static int omap2_dflt_clk_enable_wait(struct clk *clk)
282 __raw_writel(regval32, clk->enable_reg); 265 __raw_writel(regval32, clk->enable_reg);
283 wmb(); 266 wmb();
284 267
285 omap2_clk_wait_ready(clk);
286
287 return 0; 268 return 0;
288} 269}
289 270
271static int omap2_dflt_clk_enable_wait(struct clk *clk)
272{
273 int ret;
274
275 if (unlikely(clk->enable_reg == NULL)) {
276 printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
277 clk->name);
278 return 0; /* REVISIT: -EINVAL */
279 }
280
281 ret = omap2_dflt_clk_enable(clk);
282 if (ret == 0)
283 omap2_clk_wait_ready(clk);
284 return ret;
285}
286
290static void omap2_dflt_clk_disable(struct clk *clk) 287static void omap2_dflt_clk_disable(struct clk *clk)
291{ 288{
292 u32 regval32; 289 u32 regval32;
@@ -315,6 +312,11 @@ const struct clkops clkops_omap2_dflt_wait = {
315 .disable = omap2_dflt_clk_disable, 312 .disable = omap2_dflt_clk_disable,
316}; 313};
317 314
315const struct clkops clkops_omap2_dflt = {
316 .enable = omap2_dflt_clk_enable,
317 .disable = omap2_dflt_clk_disable,
318};
319
318/* Enables clock without considering parent dependencies or use count 320/* Enables clock without considering parent dependencies or use count
319 * REVISIT: Maybe change this to use clk->enable like on omap1? 321 * REVISIT: Maybe change this to use clk->enable like on omap1?
320 */ 322 */