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authorTony Lindgren <tony@atomide.com>2009-05-26 17:41:35 -0400
committerTony Lindgren <tony@atomide.com>2009-05-26 17:41:35 -0400
commit88b6f7eb9b4a06fbfe27f2d98e249577f4cfdaef (patch)
tree9ef0d7ecd3e0551ca4d13ac0134aeb3ecd8558c7 /arch/arm/mach-omap2/clock.c
parent8f9ccfeeb2cecb54dd093119291ab271ab0fd94a (diff)
parent7971687094ef48695aa56a0c03416b609bd4d1fd (diff)
Merge branch 'omap-clock-upstream' of git://git.pwsan.com/linux-2.6 into for-next
Diffstat (limited to 'arch/arm/mach-omap2/clock.c')
-rw-r--r--arch/arm/mach-omap2/clock.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index dd37483f3d18..ba528f85749c 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -547,8 +547,8 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
547 const struct clksel_rate *clkr; 547 const struct clksel_rate *clkr;
548 u32 last_div = 0; 548 u32 last_div = 0;
549 549
550 printk(KERN_INFO "clock: clksel_round_rate_div: %s target_rate %ld\n", 550 pr_debug("clock: clksel_round_rate_div: %s target_rate %ld\n",
551 clk->name, target_rate); 551 clk->name, target_rate);
552 552
553 *new_div = 1; 553 *new_div = 1;
554 554
@@ -562,7 +562,7 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
562 562
563 /* Sanity check */ 563 /* Sanity check */
564 if (clkr->div <= last_div) 564 if (clkr->div <= last_div)
565 printk(KERN_ERR "clock: clksel_rate table not sorted " 565 pr_err("clock: clksel_rate table not sorted "
566 "for clock %s", clk->name); 566 "for clock %s", clk->name);
567 567
568 last_div = clkr->div; 568 last_div = clkr->div;
@@ -574,7 +574,7 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
574 } 574 }
575 575
576 if (!clkr->div) { 576 if (!clkr->div) {
577 printk(KERN_ERR "clock: Could not find divisor for target " 577 pr_err("clock: Could not find divisor for target "
578 "rate %ld for clock %s parent %s\n", target_rate, 578 "rate %ld for clock %s parent %s\n", target_rate,
579 clk->name, clk->parent->name); 579 clk->name, clk->parent->name);
580 return ~0; 580 return ~0;
@@ -582,8 +582,8 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate,
582 582
583 *new_div = clkr->div; 583 *new_div = clkr->div;
584 584
585 printk(KERN_INFO "clock: new_div = %d, new_rate = %ld\n", *new_div, 585 pr_debug("clock: new_div = %d, new_rate = %ld\n", *new_div,
586 (clk->parent->rate / clkr->div)); 586 (clk->parent->rate / clkr->div));
587 587
588 return (clk->parent->rate / clkr->div); 588 return (clk->parent->rate / clkr->div);
589} 589}
@@ -1035,7 +1035,7 @@ void omap2_clk_disable_unused(struct clk *clk)
1035 if ((regval32 & (1 << clk->enable_bit)) == v) 1035 if ((regval32 & (1 << clk->enable_bit)) == v)
1036 return; 1036 return;
1037 1037
1038 printk(KERN_INFO "Disabling unused clock \"%s\"\n", clk->name); 1038 printk(KERN_DEBUG "Disabling unused clock \"%s\"\n", clk->name);
1039 if (cpu_is_omap34xx()) { 1039 if (cpu_is_omap34xx()) {
1040 omap2_clk_enable(clk); 1040 omap2_clk_enable(clk);
1041 omap2_clk_disable(clk); 1041 omap2_clk_disable(clk);