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authorPaul Walmsley <paul@pwsan.com>2009-01-28 14:18:19 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-08 12:50:36 -0500
commitee1eec36345871955730e36232937c9d814a6e20 (patch)
treefd305ad879f9b8bcc83e61ceb6a8bd852f5ecee8 /arch/arm/mach-omap2/clock.c
parent416db864c18343c6dcc5e9768c902460c8f8777c (diff)
[ARM] OMAP2/3 clock: clean up mach-omap2/clock.c
This patch rolls up several cleanup patches. 1. Some unnecessarily verbose variable names are used in several clock.c functions; clean these up per CodingStyle. 2. Remove omap2_get_clksel() and just use clk->clksel_reg and clk->clksel_mask directly. 3. Get rid of void __iomem * usage in omap2_clksel_get_src_field. Prepend the function name with an underscore to highlight that it is a static function. linux-omap source commits are 7fa95e007ea2f3c4d0ecd2779d809756e7775894, af0ea23f1ee4a5bea3b026e38761b47089f9048a, and 91c0c979b47c44b08f80e4f8d4c990fb158d82c4. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2/clock.c')
-rw-r--r--arch/arm/mach-omap2/clock.c98
1 files changed, 35 insertions, 63 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 752e34787f21..5d7d4c52f37e 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -298,7 +298,7 @@ static void omap2_clk_wait_ready(struct clk *clk)
298 298
299static int omap2_dflt_clk_enable(struct clk *clk) 299static int omap2_dflt_clk_enable(struct clk *clk)
300{ 300{
301 u32 regval32; 301 u32 v;
302 302
303 if (unlikely(clk->enable_reg == NULL)) { 303 if (unlikely(clk->enable_reg == NULL)) {
304 printk(KERN_ERR "clock.c: Enable for %s without enable code\n", 304 printk(KERN_ERR "clock.c: Enable for %s without enable code\n",
@@ -306,12 +306,12 @@ static int omap2_dflt_clk_enable(struct clk *clk)
306 return 0; /* REVISIT: -EINVAL */ 306 return 0; /* REVISIT: -EINVAL */
307 } 307 }
308 308
309 regval32 = __raw_readl(clk->enable_reg); 309 v = __raw_readl(clk->enable_reg);
310 if (clk->flags & INVERT_ENABLE) 310 if (clk->flags & INVERT_ENABLE)
311 regval32 &= ~(1 << clk->enable_bit); 311 v &= ~(1 << clk->enable_bit);
312 else 312 else
313 regval32 |= (1 << clk->enable_bit); 313 v |= (1 << clk->enable_bit);
314 __raw_writel(regval32, clk->enable_reg); 314 __raw_writel(v, clk->enable_reg);
315 wmb(); 315 wmb();
316 316
317 return 0; 317 return 0;
@@ -335,7 +335,7 @@ static int omap2_dflt_clk_enable_wait(struct clk *clk)
335 335
336static void omap2_dflt_clk_disable(struct clk *clk) 336static void omap2_dflt_clk_disable(struct clk *clk)
337{ 337{
338 u32 regval32; 338 u32 v;
339 339
340 if (!clk->enable_reg) { 340 if (!clk->enable_reg) {
341 /* 341 /*
@@ -347,12 +347,12 @@ static void omap2_dflt_clk_disable(struct clk *clk)
347 return; 347 return;
348 } 348 }
349 349
350 regval32 = __raw_readl(clk->enable_reg); 350 v = __raw_readl(clk->enable_reg);
351 if (clk->flags & INVERT_ENABLE) 351 if (clk->flags & INVERT_ENABLE)
352 regval32 |= (1 << clk->enable_bit); 352 v |= (1 << clk->enable_bit);
353 else 353 else
354 regval32 &= ~(1 << clk->enable_bit); 354 v &= ~(1 << clk->enable_bit);
355 __raw_writel(regval32, clk->enable_reg); 355 __raw_writel(v, clk->enable_reg);
356 wmb(); 356 wmb();
357} 357}
358 358
@@ -644,23 +644,6 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div)
644} 644}
645 645
646/** 646/**
647 * omap2_get_clksel - find clksel register addr & field mask for a clk
648 * @clk: struct clk to use
649 * @field_mask: ptr to u32 to store the register field mask
650 *
651 * Returns the address of the clksel register upon success or NULL on error.
652 */
653static void __iomem *omap2_get_clksel(struct clk *clk, u32 *field_mask)
654{
655 if (!clk->clksel_reg || (clk->clksel_mask == 0))
656 return NULL;
657
658 *field_mask = clk->clksel_mask;
659
660 return clk->clksel_reg;
661}
662
663/**
664 * omap2_clksel_get_divisor - get current divider applied to parent clock. 647 * omap2_clksel_get_divisor - get current divider applied to parent clock.
665 * @clk: OMAP struct clk to use. 648 * @clk: OMAP struct clk to use.
666 * 649 *
@@ -668,40 +651,36 @@ static void __iomem *omap2_get_clksel(struct clk *clk, u32 *field_mask)
668 */ 651 */
669u32 omap2_clksel_get_divisor(struct clk *clk) 652u32 omap2_clksel_get_divisor(struct clk *clk)
670{ 653{
671 u32 field_mask, field_val; 654 u32 v;
672 void __iomem *div_addr;
673 655
674 div_addr = omap2_get_clksel(clk, &field_mask); 656 if (!clk->clksel_mask)
675 if (!div_addr)
676 return 0; 657 return 0;
677 658
678 field_val = __raw_readl(div_addr) & field_mask; 659 v = __raw_readl(clk->clksel_reg) & clk->clksel_mask;
679 field_val >>= __ffs(field_mask); 660 v >>= __ffs(clk->clksel_mask);
680 661
681 return omap2_clksel_to_divisor(clk, field_val); 662 return omap2_clksel_to_divisor(clk, v);
682} 663}
683 664
684int omap2_clksel_set_rate(struct clk *clk, unsigned long rate) 665int omap2_clksel_set_rate(struct clk *clk, unsigned long rate)
685{ 666{
686 u32 field_mask, field_val, reg_val, validrate, new_div = 0; 667 u32 v, field_val, validrate, new_div = 0;
687 void __iomem *div_addr;
688 668
689 validrate = omap2_clksel_round_rate_div(clk, rate, &new_div); 669 if (!clk->clksel_mask)
690 if (validrate != rate)
691 return -EINVAL; 670 return -EINVAL;
692 671
693 div_addr = omap2_get_clksel(clk, &field_mask); 672 validrate = omap2_clksel_round_rate_div(clk, rate, &new_div);
694 if (!div_addr) 673 if (validrate != rate)
695 return -EINVAL; 674 return -EINVAL;
696 675
697 field_val = omap2_divisor_to_clksel(clk, new_div); 676 field_val = omap2_divisor_to_clksel(clk, new_div);
698 if (field_val == ~0) 677 if (field_val == ~0)
699 return -EINVAL; 678 return -EINVAL;
700 679
701 reg_val = __raw_readl(div_addr); 680 v = __raw_readl(clk->clksel_reg);
702 reg_val &= ~field_mask; 681 v &= ~clk->clksel_mask;
703 reg_val |= (field_val << __ffs(field_mask)); 682 v |= field_val << __ffs(clk->clksel_mask);
704 __raw_writel(reg_val, div_addr); 683 __raw_writel(v, clk->clksel_reg);
705 wmb(); 684 wmb();
706 685
707 clk->rate = clk->parent->rate / new_div; 686 clk->rate = clk->parent->rate / new_div;
@@ -737,18 +716,14 @@ int omap2_clk_set_rate(struct clk *clk, unsigned long rate)
737 716
738/* 717/*
739 * Converts encoded control register address into a full address 718 * Converts encoded control register address into a full address
740 * On error, *src_addr will be returned as 0. 719 * On error, the return value (parent_div) will be 0.
741 */ 720 */
742static u32 omap2_clksel_get_src_field(void __iomem **src_addr, 721static u32 _omap2_clksel_get_src_field(struct clk *src_clk, struct clk *clk,
743 struct clk *src_clk, u32 *field_mask, 722 u32 *field_val)
744 struct clk *clk, u32 *parent_div)
745{ 723{
746 const struct clksel *clks; 724 const struct clksel *clks;
747 const struct clksel_rate *clkr; 725 const struct clksel_rate *clkr;
748 726
749 *parent_div = 0;
750 *src_addr = NULL;
751
752 clks = omap2_get_clksel_by_parent(clk, src_clk); 727 clks = omap2_get_clksel_by_parent(clk, src_clk);
753 if (!clks) 728 if (!clks)
754 return 0; 729 return 0;
@@ -768,17 +743,14 @@ static u32 omap2_clksel_get_src_field(void __iomem **src_addr,
768 /* Should never happen. Add a clksel mask to the struct clk. */ 743 /* Should never happen. Add a clksel mask to the struct clk. */
769 WARN_ON(clk->clksel_mask == 0); 744 WARN_ON(clk->clksel_mask == 0);
770 745
771 *field_mask = clk->clksel_mask; 746 *field_val = clkr->val;
772 *src_addr = clk->clksel_reg;
773 *parent_div = clkr->div;
774 747
775 return clkr->val; 748 return clkr->div;
776} 749}
777 750
778int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) 751int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
779{ 752{
780 void __iomem *src_addr; 753 u32 field_val, v, parent_div;
781 u32 field_val, field_mask, reg_val, parent_div;
782 754
783 if (clk->flags & CONFIG_PARTICIPANT) 755 if (clk->flags & CONFIG_PARTICIPANT)
784 return -EINVAL; 756 return -EINVAL;
@@ -786,18 +758,18 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent)
786 if (!clk->clksel) 758 if (!clk->clksel)
787 return -EINVAL; 759 return -EINVAL;
788 760
789 field_val = omap2_clksel_get_src_field(&src_addr, new_parent, 761 parent_div = _omap2_clksel_get_src_field(new_parent, clk, &field_val);
790 &field_mask, clk, &parent_div); 762 if (!parent_div)
791 if (!src_addr)
792 return -EINVAL; 763 return -EINVAL;
793 764
794 if (clk->usecount > 0) 765 if (clk->usecount > 0)
795 _omap2_clk_disable(clk); 766 _omap2_clk_disable(clk);
796 767
797 /* Set new source value (previous dividers if any in effect) */ 768 /* Set new source value (previous dividers if any in effect) */
798 reg_val = __raw_readl(src_addr) & ~field_mask; 769 v = __raw_readl(clk->clksel_reg);
799 reg_val |= (field_val << __ffs(field_mask)); 770 v &= ~clk->clksel_mask;
800 __raw_writel(reg_val, src_addr); 771 v |= field_val << __ffs(clk->clksel_mask);
772 __raw_writel(v, clk->clksel_reg);
801 wmb(); 773 wmb();
802 774
803 if (clk->flags & DELAYED_APP && cpu_is_omap24xx()) { 775 if (clk->flags & DELAYED_APP && cpu_is_omap24xx()) {