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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-02-12 05:12:59 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-14 04:59:21 -0500
commit8b9dbc16d4f5786c6c930ab028722e3ed7e4285b (patch)
treed6bd11034d7d31a42275577840f5eb16b432378d /arch/arm/mach-omap2/clock.c
parent883992bd8f6924c9aa849f2dac381075e2e55a9d (diff)
[ARM] omap: arrange for clock recalc methods to return the rate
linux-omap source commit 33d000c99ee393fe2042f93e8422f94976d276ce introduces a way to "dry run" clock changes before they're committed. However, this involves putting logic to handle this into each and every recalc function, and unfortunately due to the caching, led to some bugs. Solve both of issues by making the recalc methods always return the clock rate for the clock, which the caller decides what to do with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2/clock.c')
-rw-r--r--arch/arm/mach-omap2/clock.c17
1 files changed, 9 insertions, 8 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 1b40d757500d..5020cb1f2e7e 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -239,11 +239,11 @@ u32 omap2_get_dpll_rate(struct clk *clk)
239 * Used for clocks that have the same value as the parent clock, 239 * Used for clocks that have the same value as the parent clock,
240 * divided by some factor 240 * divided by some factor
241 */ 241 */
242void omap2_fixed_divisor_recalc(struct clk *clk) 242unsigned long omap2_fixed_divisor_recalc(struct clk *clk)
243{ 243{
244 WARN_ON(!clk->fixed_div); 244 WARN_ON(!clk->fixed_div);
245 245
246 clk->rate = clk->parent->rate / clk->fixed_div; 246 return clk->parent->rate / clk->fixed_div;
247} 247}
248 248
249/** 249/**
@@ -449,21 +449,22 @@ err:
449 * Used for clocks that are part of CLKSEL_xyz governed clocks. 449 * Used for clocks that are part of CLKSEL_xyz governed clocks.
450 * REVISIT: Maybe change to use clk->enable() functions like on omap1? 450 * REVISIT: Maybe change to use clk->enable() functions like on omap1?
451 */ 451 */
452void omap2_clksel_recalc(struct clk *clk) 452unsigned long omap2_clksel_recalc(struct clk *clk)
453{ 453{
454 unsigned long rate;
454 u32 div = 0; 455 u32 div = 0;
455 456
456 pr_debug("clock: recalc'ing clksel clk %s\n", clk->name); 457 pr_debug("clock: recalc'ing clksel clk %s\n", clk->name);
457 458
458 div = omap2_clksel_get_divisor(clk); 459 div = omap2_clksel_get_divisor(clk);
459 if (div == 0) 460 if (div == 0)
460 return; 461 return clk->rate;
461 462
462 if (clk->rate == (clk->parent->rate / div)) 463 rate = clk->parent->rate / div;
463 return; 464
464 clk->rate = clk->parent->rate / div; 465 pr_debug("clock: new clock rate is %ld (div %d)\n", rate, div);
465 466
466 pr_debug("clock: new clock rate is %ld (div %d)\n", clk->rate, div); 467 return rate;
467} 468}
468 469
469/** 470/**